| Electronic Components Datasheet Search |
|
WM8148 Datasheet(PDF) 10 Page - Wolfson Microelectronics plc |
|
|
|||||||||||||||||||||||||||||
WM8148 Datasheet(HTML) 10 Page - Wolfson Microelectronics plc |
|
10 / 43 page ![]() WM8148 Production Data WOLFSON MICROELECTRONICS LTD PD Rev 4.0 April 1999 10 OUTPUT DATA OEB OP[11:0] t PZE Hi-Z t PEZ Hi-Z Figure 5 Output Data Enable Timing FDEL[1:0] = 01 MCLK FDEL[1:0] = 00 DEFAULT FDEL[1:0] = 10 FDEL[1:0] = 11 OP[11:0] OP[11:0] OP[11:0] OP[11:0] t PD t PD t PD t PD Figure 6 Output Data Timing (Including Fine Latency Control By FDEL[1:0]) TEST CONDITIONS AVDD = 4.75 to 5.25V, DVDD1 and DVDD2 = 2.97 to 5.25V, AGND = DGND = 0V, TA = 0 to 70 °C, MCLK = 48MHz unless otherwise stated (AVDD denotes the voltage applied to all AVDD pins). PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Output propagation delay tPD IOH = 1mA, IOL = 1mA 102030 ns Output enable time tPZE 15 ns Output disable time tPEZ 15 ns Note: Parameters are measured at 50% of the rising/falling edge. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |