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WM8148 Datasheet(PDF) 40 Page - Wolfson Microelectronics plc

Part # WM8148
Description  12-bit/12MSPS CCD/CIS Analogue Front End/Digitiser
PDF  43 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8148 Datasheet(HTML) 40 Page - Wolfson Microelectronics plc

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WM8148
Production Data
WOLFSON MICROELECTRONICS LTD
PD Rev 4.0 April 1999
40
MONOCHROME ODD-EVEN OUTPUT
S
E
N
S
O
R
BUFFER
WM8148
Including
recommended
external
components
SYSTEM
ASIC
BUFFER
DATA
CONTROL I/F
CLOCKS
O
E
RINP
GINP
C
O
C
E
See sensor
datasheet for
details.
SENSOR TIMING
Maximum Pixel Rate = 10.66Mpixels/second (Mode 4)
Maximum Pixel Rate = 12Mpixels/second (Mode 12)
Figure 46 Block Diagram of Monochrome CCD (Odd-Even Outputs) Application
REGISTER
SETTING
DESCRIPTION
ADDRESS
HEX
BINARY
NOTE
Set-up register 1
000001
42
0100 0010
MODE: Mode 4: Two-channel CDS
SELEN: selective power enable
Set-up register 2
000010
BF
1011 1111
SENBL: blue PGAs powered off
Set-up register 3
000011
02
0000 0010
RESREF: reset sample half-way
between video samples
Set-up register 4
000101
80
1000 0000
INVOP: invert digital output
(White = 4095)
Coarse offsets
000110
4B
0100 1011
PGAFS: ADC set up for negative
polarity video
RLCEXT, RLCV: internal VRLC
voltage, set to 3.7V
Table 11 Typical Control Register Settings for Figure 46
(CDS, Negative-Going CCD Video Signal, MCLK/VSMP = 6)
REGISTER
SETTING
DESCRIPTION
ADDRESS
HEX
BINARY
NOTE
Set-up register 1
000001
C2
1100 0010
MODE: Mode 12: Two-channel CDS
SELEN: selective power enable
Set-up register 2
000010
BF
1011 1111
SENBL: blue PGAs powered off
Set-up register 3
000011
02
0000 0010
CHAN: red channel selected
RESREF: reset sample half-way
between video samples
Set-up register 4
000101
80
1000 0000
INVOP: invert digital output
(White = 4095)
Coarse offsets
000110
4B
0100 1011
PGAFS: ADC set up for negative
polarity video
RLCEXT, RLCV: internal VRLC
voltage, set to 3.7V
Table 12 Typical Control Register Settings for Figure 46
(CDS, Negative-Going CCD Video Signal, MCLK/VSMP = 8)



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