ADF4158

Rev. 0 | Page 7 of 36

PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS

PIN 1

INDICATOR

1

CPGND

NOTES

1. THE LFCSP HAS AN EXPOSED PADDLE THAT MUST BE CONNECTED TO GND.

2

AGND

3

AGND

4

5

6

15 DATA

16 LE

17 MUXOUT

14 CLK

13 CE

ADF4158

TOP VIEW

(Not to Scale)

Figure 4. LFCSP Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

CPGND

Charge Pump Ground. This is the ground return path for the charge pump.

2, 3

AGND

Analog Ground. This is the ground return path of the prescaler.

4

Complementary Input to the RF Prescaler. Decouple this point to the ground plane with a small bypass capacitor,

typically 100 pF.

5

Input to the RF Prescaler. This small-signal input is normally ac-coupled from the VCO.

6, 7, 8

Positive Power Supply for the RF Section. Place decoupling capacitors to the digital ground plane as close as possible

9

It can be driven from a TTL or CMOS crystal oscillator, or it can be ac-coupled.

10

DGND

Digital Ground.

11

SDGND

Digital Σ-Δ Modulator Ground. Ground return path for the Σ-Δ modulator.

12

Tx Data Pin. Provide data to be transmitted in FSK or PSK mode on this pin.

13

CE

Chip Enable. A logic low on this pin powers down the device and puts the charge pump output into three-state mode.

14

CLK

Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched into the shift

register on the CLK rising edge. This input is a high impedance CMOS input.

15

DATA

Serial Data Input. The serial data is loaded MSB first with the three LSBs being the control bits. This input is a high

impedance CMOS input.

16

LE

Load Enable, CMOS Input. When LE is high, the data stored in the shift registers is loaded into one of the eight latches,

with the latch being selected using the control bits.

17

MUXOUT

Multiplexer Output. This pin allows either the RF lock detect, the scaled RF, or the scaled reference frequency to be

accessed externally.

18

capacitors to the ground plane as close as possible to this pin.

19

Positive Power Supply for the Digital Section. Place decoupling capacitors to the digital ground plane as close as

20 , 21

SW1, SW2

Switches for Fast Lock.

22

5.5 V and used to drive a VCO with a tuning range of up to 5.5 V.

23

Connecting a resistor between this pin and ground sets the maximum charge pump output current. The relationship

SET

CPmax

R

I

5

.

25

=

where:

24

CP

25

EPAD

Exposed Paddle. The LFCSP has an exposed paddle that must be connected to GND.