Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

P89LPC915FDH Datasheet(PDF) 56 Page - NXP Semiconductors

Part # P89LPC915FDH
Description  8-bit microcontrollers with accelerated two-clock 80C51 core 2 kB 3 V flash with 8-bit A/D converter
PDF  75 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

P89LPC915FDH Datasheet(HTML) 56 Page - NXP Semiconductors

Back Button P89LPC915FDH Datasheet HTML 52Page - NXP Semiconductors P89LPC915FDH Datasheet HTML 53Page - NXP Semiconductors P89LPC915FDH Datasheet HTML 54Page - NXP Semiconductors P89LPC915FDH Datasheet HTML 55Page - NXP Semiconductors P89LPC915FDH Datasheet HTML 56Page - NXP Semiconductors P89LPC915FDH Datasheet HTML 57Page - NXP Semiconductors P89LPC915FDH Datasheet HTML 58Page - NXP Semiconductors P89LPC915FDH Datasheet HTML 59Page - NXP Semiconductors P89LPC915FDH Datasheet HTML 60Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 56 / 75 page
background image
P89LPC915_916_917_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 15 December 2009
56 of 75
NXP Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
9.7 DAC output to a port pin with high output impedance
The A/D converter’s DAC block can be output to a port pin. In this mode, the AD1DAT3
register is used to hold the value fed to the DAC. After a value has been written to the DAC
(written to AD1DAT3), the DAC output will appear on the channel 3 pin.
9.8 Clock divider
The A/D converter requires that its internal clock source be in the range of 500 kHz to
3.3 MHz to maintain accuracy. A programmable clock divider that divides the clock
from 1 to 8 is provided for this purpose.
9.9 Power-down and Idle mode
In Idle mode the A/C converter, if enabled, will continue to function and can cause the
device to exit Idle mode when the conversion is completed if the A/D interrupt is enabled.
In Power-down mode or Total Power-down mode, the A/D does not function. If the A/D is
enabled, it will consume power. Power can be reduced by disabling the A/D.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com