MAC7200 datasheet(263/976 Pages) FREESCALE

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Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

185

2. The second pass through the DR then shifts the data in or out of the JTAG port, LSB first.

a) During a read access, data is latched from the selected Nexus register when the JTAG state

machine (see 11.12, “IEEE 1149.1 State Machine and RD/WR Sequences”) passes through the

“Capture-DR” state.

b) During a write access, data is latched into the selected Nexus register when the JTAG state

machine (see 11.12, “IEEE 1149.1 State Machine and RD/WR Sequences”) passes through the

“Update-DR” state.

11.11.5.3 Memory Mapped Register Access via JTAG

Using the Read/Write Access Registers (RWCS/RWA/RWD), memory mapped AHB resources can be

accessed through Nexus. The following steps are required to access memory mapped resources:

NOTE

Read/Write Access can only access memory mapped resources when

system reset is negated.

11.11.5.3.1

Single Write Access

1. Initialize the Read/Write Access Address Register (RWA) through the JTAG access method

outlined in Section 11.11.5.2, “Read/Write Access to Internal Nexus Registers,” using the Nexus

— Write Address

→ 32'hxxxxxxxx (write address)

2. Initialize the Read/Write Access Control/Status Register (RWCS) through the JTAG access

method outlined in Section 11.11.5.2, “Read/Write Access to Internal Nexus Registers,” using the

Nexus Register Index of 0x7 (see Table 11-21). Configure the bits as follows:

— Access Control (AC)

→ 1'b1 (to indicate start access)

—Map Select (MAP)

→ 3'b000 (primary memory map)

Access: User read/write

321

NRI

R/W

Reset

000

Figure 11-49. JTAG Data Register (DR)

Table 11-45. JTAG Data Register Field Description

Field

Description

7–1

NRI

Nexus Register Index

Selected from values in Table 11-21

R/W

R/W – Read Write

0Read

1Write

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