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MAC7200 Datasheet(PDF) 282 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 282 Page - Freescale Semiconductor, Inc

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The SPP DMA Controller Module (SPP_DMA2)
MAC7200 Microcontroller Family Reference Manual, Rev. 2
204
Freescale Semiconductor
5. At the conclusion of the minor loop’s execution, certain fields of the transfer control descriptor are
written back to the local TCD memory.
The process (steps 2-5) is repeated until the outer major loop’s iteration count is exhausted. At that time,
additional processing steps are completed, e.g., the optional assertion of an interrupt request signaling the
transfer’s completion, final adjustments to the source and destination addresses, etc. A more detailed
description of the channel processing is listed in the pseudo-code below. This simplified example is
intended to represent basic data transfers. Detailed processing associated with the error handling is
omitted.
/* the given DMAchannel is requesting service by the software assertion of the
tcd[channel].start bit, the assertion of an enabled ipd_req from a device, or
the implicit assertion of a channel-to-channel link */
/* begin by reading the transfer control descriptor from the local RAM
into the local dma_engine registers */
dma_engine
= read_from_local_memory [channel];
dma_engine.active = 1;
/* set active flag */
dma_engine.done
= 0;
/* clear done flag */
/* check the transfer control descriptor for consistency */
if (dma_engine.config_error == 0) {
/ * begin execution of the inner “minor” loop transfers */
{
/* convert the source transfer size into a byte count */
switch (dma_engine.ssize) {
case 0:
/* 8-bit transfer */
src_xfr_size = 1;
break;
case 1:
/* 16-bit transfer */
src_xfr_size = 2;
break;
case 2:
/* 32-bit transfer */
src_xfr_size = 4;
break;
case 3:
/* 64-bit transfer */
src_xfr_size = 8;
break;
case 4:
/* 16-byte burst transfer */
src_xfr_size = 16;
break;
case 5:
/* 32-byte burst transfer */
src_xfr_size = 32;
break;
}
/* convert the destination transfer size into a byte count */
switch (dma_engine.dsize) {
case 0:
/* 8-bit transfer */
dest_xfr_size = 1;
break;
case 1:
/* 16-bit transfer */
dest_xfr_size = 2;



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