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TAS5616PHD Datasheet(PDF) 5 Page - Texas Instruments

Part # TAS5616PHD
Description  160-W STEREO / 300-W MONO PurePath??HD DIGITAL-INPUT POWER STAGE
PDF  33 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TAS5616PHD Datasheet(HTML) 5 Page - Texas Instruments

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TAS5616
www.ti.com
SLAS596B – JUNE 2009 – REVISED JANUARY 2010
TERMINAL FUNCTIONS
TERMINAL
FUNCTION(1)
DESCRIPTION
PHD
DKD
NAME
NO.
NO.
AGND
8
10
P
Analog ground
BST_A
54
43
P
HS bootstrap supply (BST), external 0.033 mF capacitor to OUT_A required.
BST_B
41
34
P
HS bootstrap supply (BST), external 0.033 mF capacitor to OUT_B required.
BST_C
40
33
P
HS bootstrap supply (BST), external 0.033 mF capacitor to OUT_C required.
BST_D
27
24
P
HS bootstrap supply (BST), external 0.033 mF capacitor to OUT_D required.
C_STARTUP
3
5
O
Startup ramp requires a charging capacitor of 4.7 nF to AGND
CLIP
18
—
O
Clipping warning; open drain; active low
7, 23,
GND
24, 57,
9
P
Ground
58
GND_A
48, 49
38
P
Power ground for half-bridge A
GND_B
46, 47
37
P
Power ground for half-bridge B
GND_C
34, 35
30
P
Power ground for half-bridge C
GND_D
32, 33
29
P
Power ground for half-bridge D
GVDD_A
55
—
P
Gate drive voltage supply requires 0.1 mF capacitor to AGND
GVDD_AB
—
44
P
Gate drive voltage supply requires 0.22 mF capacitor to AGND
GVDD_B
56
—
P
Gate drive voltage supply requires 0.1 mF capacitor to AGND
GVDD_C
25
—
P
Gate drive voltage supply requires 0.1 mF capacitor to AGND
GVDD_CD
—
23
P
Gate drive voltage supply requires 0.22 mF capacitor to AGND
GVDD_D
26
—
P
Gate drive voltage supply requires 0.1 mF capacitor to AGND
INPUT_A
4
6
I
Input signal for half bridge A
INPUT_B
5
7
I
Input signal for half bridge B
INPUT_C
10
12
I
Input signal for half bridge C
INPUT_D
11
13
I
Input signal for half bridge D
M1
20
20
I
Mode selection
M2
21
21
I
Mode selection
M3
22
22
I
Mode selection
NC
59-62
—
—
No connect, pins may be grounded.
NC
13
15
—
No connect, pins may be grounded.
NC
14
16
—
No connect, pins may be grounded.
OC_ADJ
1
3
O
Analog over current programming pin requires resistor to ground.
64 pin QFP package (PHD) = 22 k
Ω
44 pin PSOP3 Package (DKD) = 24 k
Ω
OTW
—
18
O
Overtemperature warning signal, open drain, active low.
OTW1
16
—
O
Overtemperature warning signal, open drain, active low.
OTW2
17
—
O
Overtemperature warning signal, open drain, active low.
OUT_A
52, 53
39, 40
O
Output, half bridge A
OUT_B
44, 45
36
O
Output, half bridge B
OUT_C
36, 37
31
O
Output, half bridge C
OUT_D
28, 29
27, 28
O
Output, half bridge D
PSU_REF
63
1
P
PSU Reference requires close decoupling of 4.7 mF to AGND
PVDD_A
50, 51
41, 42
P
Power supply input for half bridges A requires close decoupling of 2.2-mF capacitor to GND_A
PVDD_B
42, 43
35
P
Power supply input for half bridges B requires close decoupling of 2.2-mF capacitor to GND_B
PVDD_C
38, 39
32
P
Power supply input for half bridges C requires close decoupling of 2.2-mF capacitor to GND_C
PVDD_D
30, 31
25, 26
P
Power supply input for half bridges D requires close decoupling of 2.2-mF capacitor to GND_D
READY
19
19
O
Normal operation; open drain; active high
RESET
2
4
I
Device reset Input; active low
SD
15
17
O
Shutdown signal, open drain, active low
TEST
12
14
I
Connect to VREG node
(1)
I = Input, O = Output, P = Power
Copyright © 2009–2010, Texas Instruments Incorporated
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Product Folder Link(s) :TAS5616



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