TAS5616PHD datasheet(9/33 Pages) TI

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TAS5616

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SLAS596B – JUNE 2009 – REVISED JANUARY 2010

ELECTRICAL CHARACTERISTICS

PVDD_X = 50 V, GVDD_X = 12 V, VDD = 12 V, TC (Case temperature) = 75°C, fS = 384 kHz, unless otherwise specified.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

INTERNAL VOLTAGE REGULATOR AND CURRENT CONSUMPTION

Voltage regulator, only used as reference

VREG

VDD = 12 V

3.3

3.6

node

VI_CM

Analog comparator reference node

1.5

1.75

1.9

Operating, 50% duty cycle

22.5

IVDD

VDD supply current

Idle, reset mode

22.5

50% duty cycle

IGVDD_x

Gate-supply current per half-bridge

Reset mode

1.5

50% duty cycle without output filter or

load

IPVDD_x

Half-bridge idle current

Reset mode, No switching

610

OUTPUT-STAGE MOSFETs

RDS(on),LS

Drain-to-source resistance, (LS)

120

200

Ω

TJ = 25°C, exclude metallization

resistance, GVDD = 12 V

RDS(on),HS

Drain-to-source resistance, (HS)

120

200

Ω

I/O PROTECTION

Vuvp,G

Undervoltage protection limit, GVDD_x

9.5

Vuvp,hyst

(1)

0.6

OTW1(1)

Overtemperature warning 1

100

105

°C

OTW2(1)

Overtemperature warning 2

115

125

135

°C

Temperature drop needed below OTW

OTWHYST

(1)

temperature for OTW to be inactive after

°C

OTW event.

OTE(1)

Overtemperature error

145

155

165

°C

OTE-

OTE-OTW differential

°C

OTWdifferential

(1)

A reset needs to occur for SD to be released

OTEHYST

(1)

°C

following an OTE event

OLPC

Overload protection counter

fPWM = 384 kHz

2.6

Resistor – programmable, nominal peak

current in 1

Ω load, 64 pin QFP package

(PHD)

ROCP = 22 kΩ

IOC

Overcurrent limit protection

Resistor – programmable, nominal peak

current in 1

Ω load, 44 pin PSOP3

package (DKD)

ROCP = 24 kΩ

Resistor – programmable, nominal peak

current in 1

Ω load,

IOC_LATCHED

Overcurrent limit protection

ROCP = 47 kΩ

Time from application of short condition to

IOCT

Overcurrent response time

150

Hi-Z of affected half bridge

Connected when RESET is active to

IPD

Output pulldown current of each half bridge

provide bootstrap charge. Not used in SE

mode.

STATIC DIGITAL SPECIFICATIONS

VIH

High level input voltage

INPUT_X, M1, M2, M3, RESET

VIL

Low level input voltage

0.8

Leakage

Input leakage current

100

(1)

Specified by design.

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