IR3502

Page 17 of 39

July 28, 2009

Current

Sense

Amplifier

Phase IC

+

-

Phase IC

Current

Sense

Amplifier

3k

CSIN+

IOUT

CSIN-

VDAC

+

-

3k

VDAC

CSIN+

CSIN-

IOUT

EAOUT

VDAC

Error

Amplifier

Thermal

Comp

Amplifier

VDAC

Buffer

Remote

Sense

Amplifier

FB

RTCMP2

RTHERM

RTCMP1

VDRP

+

-

DAC_BUFF

VN

RTCMP3

200k

100k

+

-

+

-

RFB

+

-

RDRP

VOSEN-

VOSEN+

VDAC1

VO

IIN

Control IC

Figure 8 Adaptive voltage positioning with thermal compensation.

Start-up Sequence

The IR3502 has a programmable soft-start function to limit the surge current during the converter start-up. A

capacitor connected between the SS/DEL and LGND pins controls soft start timing, over-current protection delay

and hiccup mode timing. A charge current of 52.5uA and discharge current of 4uA control the up slope and down

slope of the voltage at the SS/DEL pin respectively. Figure 9 depicts start-up sequence of converter with VR 11.1

VID. If there is no fault, as the ENABLE is asserted, the SS/DEL pin will start charging. The error amplifier output

EAOUT is clamped low until SS/DEL reaches 1.4V. The error amplifier will then regulate the converter’s output

voltage to match the SS/DEL voltage less the 1.4V offset until the converter output reaches the 1.1V boot voltage.

The SS/DEL voltage continues to increase until it rises above the 3.0V threshold of VID delay comparator. The VID

set inputs are then activated and VDAC pin transitions to the level determined by the VID inputs. The SS/DEL

voltage continues to increase until it rises above 3.92V and allows the VRRDY signal to be asserted. SS/DEL finally

settles at 4.0V, indicating the end of the soft start. The remote sense amplifier has a very low operating range of 50

mV in order to achieve a smooth soft start of output voltage without bump.

The VCCL under voltage lock-out, VID fault modes, over current, as well as a low signal on the ENABLE input

immediately sets the fault latch, which causes the EAOUT pin to drive low turning off the phase IC drivers. The

VRRDY pin also drives low and SS/DEL begin to discharge until the voltage reaches 0.2V. If the fault has cleared

the fault latch will be reset by the discharge comparator allowing a normal soft start to occur.

Other fault conditions, such as over voltage, open sense lines, open loop monitor, and open daisy chain, set

different fault latches, which start discharging SS/DEL, pull down EAOUT voltage and drive VRRDY low. However,

the latches can only be reset by cycling VCCL power.