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PCA9620 Datasheet(PDF) 33 Page - NXP Semiconductors |
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PCA9620 Datasheet(HTML) 33 Page - NXP Semiconductors |
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33 / 71 page ![]() PCA9620 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 9 December 2010 33 of 71 NXP Semiconductors PCA9620 Universal LCD driver for low multiplex rates 7.4.5 Charge pump driving capability Figure 25 illustrates the main factor determining how much current the charge pump can deliver. The output resistance of the charge pump is specified in Table 35 on page 55. With these values it can be calculated how much current the charge pump can drive under certain conditions. Example: Assuming the user would like to have the normal operation point at 25 °C with VLCD = 7.0 V and VDD2 = 5.0 V and the charge pump is set to 2 × VDD2. Then the theoretical value of VLCD is 10.0 V and the desired one is 7.0 V. The difference between the theoretical maximum value and desired one is 3.0 V. The charge pump resistance is nominally 0.85 k Ω. Equation 7 shows the possible current that the charge pump could deliver: (7) For this example we get: In cases where no extreme driving capability is needed, a command is available for decreasing the charge pump frequency (see Table 22 on page 11) and thus reducing the total current consumption. If the charge pump frequency is halved, then the driving capability is halved as well, whereas the output resistance doubles. 7.4.6 Charge pump frequency settings and power efficiency The PCA9620 offers the possibility to use different frequency settings for the charge pump. Bit CPF controls the frequency at which the charge pump is running (see Table 22 on page 11). This frequency has a direct influence on the current consumption of the IC but also on the charge pump driving capability. Using a lower charge pump frequency decreases the current consumption and the driving capability. The power efficiency of the charge pump determines in certain applications which frequency settings to choose for the CPF bit. In the example shown in Figure 26, the current consumption was measured with the charge pump set to 2 × V DD2 and with VDD2 = 3.0 V and VPR[7:0] set to maximum to obtain the maximum possible VLCD with this setup, which is close to 6.0 V. The current load on pin VLCD determines the output power delivered by the IC: (8) The current consumption on pin VDD2 determines the input power taken by the IC: Fig 25. Charge pump model (used to characterize the driving strength) Theoretical VLCD value VLCD = 2 × VDD2 or VLCD = 3 × VDD2 Output Resistance Ro(cp) Regulated desired VLCD This supplies the segments and backplanes 013aaa259 I load ΔV LCD R ocp () ⁄ = I load 3.0 V 0.85 k Ω ⁄ 3.5 mA == P o I load V LCD × = |
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