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MSP430F167IPMR Datasheet(PDF) 28 Page - Texas Instruments |
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MSP430F167IPMR Datasheet(HTML) 28 Page - Texas Instruments |
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28 / 77 page ![]() MSP430F15x, MSP430F16x, MSP430F161x MIXED SIGNAL MICROCONTROLLER SLAS368G − OCTOBER 2002 − REVISED MARCH 2011 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) Schmitt-trigger inputs − ports P1, P2, P3, P4, P5, P6, RST/NMI, JTAG (TCK, TMS, TDI/TCLK, TDO/TDI) PARAMETER VCC MIN TYP MAX UNIT V Positive going input threshold voltage 2.2 V 1.1 1.5 V VIT+ Positive-going input threshold voltage 3 V 1.5 1.98 V V Negative going input threshold voltage 2.2 V 0.4 0.9 V VIT− Negative-going input threshold voltage 3 V 0.9 1.3 V V Input voltage hysteresis (V V ) 2.2 V 0.3 1.1 V Vhys Input voltage hysteresis (VIT+ − VIT−) 3 V 0.5 1 V inputs Px.x, TAx, TBx PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT t External interrupt timing Port P1, P2: P1.x to P2.x, external trigger 2.2 V 62 ns t(int) External interrupt timing Port P1, P2: P1.x to P2.x, external trigger signal for the interrupt flag (see Note 1) 3 V 50 ns TA0, TA1, TA2 2.2 V 62 t(cap) Timer_A, Timer_B capture timing TB0, TB1, TB2, TB3, TB4, TB5, TB6 (see Note 2) 3 V 50 ns f(TAext) Timer_A, Timer_B clock frequency TACLK TBCLK INCLK: t =t 2.2 V 8 MHz f(TBext) Timer_A, Timer_B clock frequency externally applied to pin TACLK, TBCLK, INCLK: t(H) = t(L) 3 V 10 MHz f(TAint) Timer A Timer B clock frequency SMCLK or ACLK signal selected 2.2 V 8 MHz f(TBint) Timer_A, Timer_B clock frequency SMCLK or ACLK signal selected 3 V 10 MHz NOTES: 1. The external signal sets the interrupt flag every time the minimum t(int) parameters are met. It may be set even with trigger signals shorter than t(int). 2. Seven capture/compare registers in ’F16x/161x and three capture/compare registers in ’F15x. leakage current − ports P1, P2, P3, P4, P5, P6 (see Note 1) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT Ilkg(Px.y) Leakage current Port Px V(Px.y) (see Note 2) 2.2 V/3 V ±50 nA NOTES: 1. The leakage current is measured with VSS or VCC applied to the corresponding pin(s), unless otherwise noted. 2. The port pin must be selected as input. |
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