MSP430F167IPMR datasheet(17/77 Pages) TI

17 / 77 page

MSP430F15x, MSP430F16x, MSP430F161x

MIXED SIGNAL MICROCONTROLLER

SLAS368G − OCTOBER 2002 − REVISED MARCH 2011

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

peripherals

Peripherals are connected to the CPU through data, address, and control busses and can be handled using

all instructions. For complete module descriptions, see the MSP430x1xx Family User’s Guide, literature number

SLAU049.

DMA controller

The DMA controller allows movement of data from one memory address to another without CPU intervention.

For example, the DMA controller can be used to move data from the ADC12 conversion memory to RAM. Using

the DMA controller can increase the throughput of peripheral modules. The DMA controller reduces system

power consumption by allowing the CPU to remain in sleep mode without having to awaken to move data to

or from a peripheral.

oscillator and system clock

The clock system in the MSP430F15x and MSP430F16x(x) family of devices is supported by the basic clock

module that includes support for a 32768-Hz watch crystal oscillator, an internal digitally-controlled oscillator

(DCO) and a high frequency crystal oscillator. The basic clock module is designed to meet the requirements

of both low system cost and low-power consumption. The internal DCO provides a fast turn-on clock source

and stabilizes in less than 6

μs. The basic clock module provides the following clock signals:

D Auxiliary clock (ACLK), sourced from a 32768-Hz watch crystal or a high frequency crystal.

D Main clock (MCLK), the system clock used by the CPU.

D Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.

brownout, supply voltage supervisor (SVS)

The brownout circuit is implemented to provide the proper internal reset signal to the device during power on

and power off. The supply voltage supervisor (SVS) circuitry detects if the supply voltage drops below a user

selectable level and supports both supply voltage supervision (the device is automatically reset) and supply

voltage monitoring (SVM, the device is not automatically reset).

The CPU begins code execution after the brownout circuit releases the device reset. However, VCC may not

have ramped to VCC(min) at that time. The user must insure the default DCO settings are not changed until VCC

reaches VCC(min). If desired, the SVS circuit can be used to determine when VCC reaches VCC(min).

digital I/O

There are six 8-bit I/O ports implemented—ports P1 through P6:

D All individual I/O bits are independently programmable.

D Any combination of input, output, and interrupt conditions is possible.

D Edge-selectable interrupt input capability for all the eight bits of ports P1 and P2.

D Read/write access to port-control registers is supported by all instructions.

watchdog timer

The primary function of the watchdog timer (WDT) module is to perform a controlled system restart after a

software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog

function is not needed in an application, the module can be configured as an interval timer and can generate

interrupts at selected time intervals.

hardware multiplier (MSP430F16x/161x only)

The multiplication operation is supported by a dedicated peripheral module. The module performs 16

16,

8, 8

16, and 8

8 bit operations. The module is capable of supporting signed and unsigned multiplication

as well as signed and unsigned multiply and accumulate operations. The result of an operation can be accessed

immediately after the operands have been loaded into the peripheral registers. No additional clock cycles are

required.

MSP430F167IPMR Datasheet(PDF) 17 Page - Texas Instruments

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