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MSP430F167IPMR Datasheet(PDF) 51 Page - Texas Instruments |
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MSP430F167IPMR Datasheet(HTML) 51 Page - Texas Instruments |
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51 / 77 page ![]() MSP430F15x, MSP430F16x, MSP430F161x MIXED SIGNAL MICROCONTROLLER SLAS368G − OCTOBER 2002 − REVISED MARCH 2011 51 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION input/output schematics (continued) port P2, P2.0 to P2.2, P2.6, and P2.7 input/output with Schmitt trigger P2IN.x P2OUT.x Pad Logic P2DIR.x P2SEL.x Module X OUT Edge Select Interrupt P2SEL.x P2IES.x P2IFG.x P2IE.x P2IRQ.x Direction Control P2.0/ACLK 0 1 0 1 Interrupt Flag Set EN Q Module X IN EN D Bus Keeper CAPD.X P2.1/TAINCLK P2.2/CAOUT/TA0 P2.6/ADC12CLK/DMAE0 P2.7/TA0 0: Input 1: Output x: Bit Identifier 0 to 2, 6, and 7 for Port P2 From Module PnSel.x PnDIR.x Dir. CONTROL FROM MODULE PnOUT.x MODULE X OUT PnIN.x MODULE X IN PnIE.x PnIFG.x PnIES.x P2Sel.0 P2DIR.0 P2DIR.0 P2OUT.0 ACLK P2IN.0 unused P2IE.0 P2IFG.0 P2IES.0 P2Sel.1 P2DIR.1 P2DIR.1 P2OUT.1 DVSS P2IN.1 INCLK‡ P2IE.1 P2IFG.1 P2IES.1 P2Sel.2 P2DIR.2 P2DIR.2 P2OUT.2 CAOUT† P2IN.2 CCI0B‡ P2IE.2 P2IFG.2 P2IES.2 P2Sel.6 P2DIR.6 P2DIR.6 P2OUT.6 ADC12CLK¶ P2IN.6 DMAE0# P2IE.6 P2IFG.6 P2IES.6 P2Sel.7 P2DIR.7 P2DIR.7 P2OUT.7 Out0 signal§ P2IN.7 unused P2IE.7 P2IFG.7 P2IES.7 † Signal from Comparator_A ‡ Signal to Timer_A § Signal from Timer_A ¶ ADC12CLK signal is output of the 12-bit ADC module # Signal to DMA, channel 0, 1 and 2 |
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