MCP3903 datasheet(14/54 Pages) MICROCHIP

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MCP3903

DS25048B-page 14

3.0

PIN DESCRIPTION

TABLE 3-1:

PIN FUNCTION TABLE

3.1

RESET

This pin is active low and places the entire chip in a

reset state when active.

When RESET=0, all registers are reset to their default

value, no communication can take place, no clock is

distributed inside the part. This state is equivalent to a

POR state.

Since the default state of the ADCs is on, the analog

power consumption when RESET = 0 is equivalent to

when RESET = 1. Only the digital power consumption

is largely reduced because this current consumption is

essentially dynamic and is reduced drastically when

there is no clock running. All the analog biases are

enabled during a reset so that the part is fully

operational just after a RESET rising edge. This input

is Schmitt triggered.

3.2

Digital VDD (DVDD)

DVDD is the power supply pin for the digital circuitry

within the MCP3903. This pin requires appropriate

bypass capacitors and should be maintained between

2.7V and 3.6V for specified operation.

Pin No.

Symbol

Function

1AVDD

Analog Power Supply Pin

CH0+

Non-Inverting Analog Input Pin for Channel 0

CH0-

Inverting Analog Input Pin for Channel 0

CH1-

Inverting Analog Input Pin for Channel 1

CH1+

Non-Inverting Analog Input Pin for Channel 1

CH2+

Non-Inverting Analog Input Pin for Channel 2

CH2-

Inverting Analog Input Pin for Channel 2

CH3-

Inverting Analog Input Pin for Channel 3

CH3+

Non-Inverting Analog Input Pin for Channel 3

CH4+

Non-Inverting Analog Input Pin for Channel 4

CH4-

Inverting Analog Input Pin for Channel 4

CH5-

Inverting Analog Input Pin for Channel 5

CH5+

Non-Inverting Analog Input Pin for Channel 5

REFIN+/OUT Non-Inverting Voltage Reference Input and Internal Reference Output Pin

REFIN-

Inverting Voltage Reference Input Pin

AGND

Analog Ground Pin, Return Path for internal analog circuitry

DGND

Digital Ground Pin, Return Path for internal digital circuitry

DRA

Data Ready Signal Output for channels pair A

DRB

Data Ready Signal Output for channels pair B

DRC

Data Ready Signal Output for channels pair C

OSC1

Oscillator Crystal Connection Pin or Clock Input Pin

OSC2

Oscillator Crystal Connection Pin

Chip Select for Serial Interface

SCK

Serial Interface Clock Pin

SDO

Serial Interface Data Output Pin

SDI

Serial Interface Data Input Pin

RESET

Master Reset Logic Input Pin

DVDD

Digital Power Supply Pin

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