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MPC5125 Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc |
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MPC5125 Datasheet(HTML) 35 Page - Freescale Semiconductor, Inc |
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35 / 94 page ![]() l NOTES: 1 Pins controlled by the STD_PU_ST register have a Schmitt trigger input; pins controlled by the STD_PU register do not. Pins controlled by the IO_CONTROL_MEM register access their alternate function ALT3 by setting the IO_CONTROL_MEM[16BIT] bit. This setting applies to all pins controlled by IO_CONTROL_MEM. Pins not controlled by these registers are indicated with a “—”. 2 Offset from IOCONTROL_BASE (default is 0xFF40_A000). 3 Except where noted in the Notes column, ALT0 is the primary (default) function for each pin after reset. 4 Alternate functions are chosen by setting the values of the STD_PU[FUNCMUX] bitfields inside the I/O Control module. – STD_PU[FUNCMUX] = 00 ALT0 (default) – STD_PU[FUNCMUX] = 01 ALT1 – STD_PU[FUNCMUX] = 10 ALT2 – STD_PU[FUNCMUX] = 11 ALT3 For selecting alternate functions, the STD_PU and STD_PU_ST registers function the same. When no function is available on a pin’s given ALTn function (value of STD_PU[FUNCMUX] ), it is shown as “—”. 5 Module included on the MCU. |
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