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MPC5125 Datasheet(PDF) 17 Page - Freescale Semiconductor, Inc |
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MPC5125 Datasheet(HTML) 17 Page - Freescale Semiconductor, Inc |
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17 / 94 page  LPC_ACK_B 0x08 STD_PU ALT0 ALT1 ALT2 ALT3 LPC_ACK/LPC_BURST NFC_CE1 LPC_CS1 GPIO08 LPC NFC LPC GPIO1 I/O O O I/O VDD_IO — P3 LPC_AX03 0x09 STD_PU ALT0 ALT1 ALT2 ALT3 LPC_AX03/LPC_TS NFC_CE2 LPC_CS2 — LPC NFC LPC — O O O — VDD_IO — L1 EMB_AD00 0x2C STD_PU ALT0 ALT1 ALT2 ALT3 LPC_AD00/NFC_AD00 — RST_CONF_LOC0 — LPC — — I/O — — VDD_IO ALT2: Reset configuration Boot ROM Location 0 A4 EMB_AD01 0x2B STD_PU ALT0 ALT1 ALT2 ALT3 LPC_AD01/NFC_AD01 — RST_CONF_LOC1 — LPC — — I/O — — VDD_IO ALT2: Reset configuration Boot ROM Location 1 A3 EMB_AD02 0x2A STD_PU ALT0 ALT1 ALT2 ALT3 LPC_AD02/NFC_AD02 — RST_CONF_BMS — LPC — — I/O — — VDD_IO ALT2: Reset configuration Boot Mode Select B4 EMB_AD03 0x29 STD_PU ALT0 ALT1 ALT2 ALT3 LPC_AD03/NFC_AD03 — RST_CONF_LPCDBW0 — LPC — — I/O — — VDD_IO ALT2: Reset configuration LPC Port Size 0 B3 EMB_AD04 0x28 STD_PU ALT0 ALT1 ALT2 ALT3 LPC_AD04/NFC_AD04 — RST_CONF_LPCDBW1 — LPC — — I/O — — VDD_IO ALT2: Reset configuration LPC Port Size 1 D5 Table 2. MPC5125 Pin Multiplexing (continued) Pin Pad I/O Control Register1 and Offset2 Alternate Function3 Functions4 Peripheral5 I/O Direction Power Domain Notes Pin |
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