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MPC5125 Datasheet(PDF) 62 Page - Freescale Semiconductor, Inc |
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MPC5125 Datasheet(HTML) 62 Page - Freescale Semiconductor, Inc |
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62 / 94 page ![]() MPC5125 Microcontroller Data Sheet, Rev. 4 Electrical and Thermal Characteristics Freescale Semiconductor 62 4.3.7 NFC The NAND flash controller (NFC) implements the interface to standard NAND flash memory devices. This section describes the timing parameters of the NFC. TH is the flash clock high time, TL is flash clock low time, where TH = 5 × NFC_RATIO_H / 8 (ns) Eqn. 6 TL = 5 × NFC_RATIO_L / 8 (ns) Eqn. 7 Refer to the MPC5125 Reference Manual (MPC5125RM) for more information about NFC_RATIO_H and NFC_RATIO_L. Table 26. NFC Target Timing Characteristics Timing Parameter Description Min. value Max. value Unit SpecID tCLS NFC_CLE setup time 2TH + TL – 1 — ns A8.1 tCLH NFC_CLE hold time TH + TL – 1 — ns A8.2 tCS NFC_CE[3:0] setup time 2TH + TL – 1 — ns A8.3 tCH NFC_CE[3:0] hold time TH + TL — ns A8.4 tWP NFC_WP pulse width TL – 1 — ns A8.5 tALS NFC_ALE setup time 2TH + TL — ns A8.6 tALH NFC_ALE hold time TH + TL — ns A8.7 tDS Data setup time TL – 1 — ns A8.8 tDH Data hold time TH – 1 — ns A8.9 tWC Write cycle time TH + TL – 1 — ns A8.10 tWH NFC_WE hold time TH – 1 — ns A8.11 tRR Ready to NFC_RE low 4TH + 3TL + 90 — ns A8.12 tRP NFC_RE pulse width TL + 1 — ns A8.13 tRC READ cycle time TL + TH – 1 — ns A8.14 tREH NFC_RE high hold time TH – 1 — ns A8.15 tIS Data input setup time 6 — ns A8.16 |
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