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HT67F60 Datasheet(PDF) 133 Page - Holtek Semiconductor Inc

Part # HT67F60
Description  TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPROM
PDF  242 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT67F60 Datasheet(HTML) 133 Page - Holtek Semiconductor Inc

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HT67F30/HT67F40/HT67F50/HT67F60
TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPROM
Rev. 1.50
132
March 06 , 2012
Rev. 1.50
133
March 06 , 2012
This bit controls the overall on/off function of the TM. Setting the bit high enables the
counter to run, clearing the bit disables the TM. Clearing this bit to zero will stop the
counter from counting and turn off the TM which will reduce its power consumption.
When the bit changes state from low to high the internal counter value will be reset to
zero, however when the bit changes from high to low, the internal counter will retain
its residual value until the bit returns high again.
If the TM is in the Compare Match Output Mode then the TM output pin will be reset
to its initial condition, as specified by the T1OC bit, when the T1ON bit changes from
low to high.
Bit 2~0
T1RP2~T1RP0: TM1 CCRP 3-bit register, compared with the TM1 Counter bit 9~bit 7
Comparator P Match Period
000: 1024 TM1 clocks
001: 128 TM1 clocks
010: 256 TM1 clocks
011: 384 TM1 clocks
100: 512 TM1 clocks
101: 640 TM1 clocks
110: 768 TM1 clocks
111: 896 TM1 clocks
These three bits are used to setup the value on the internal CCRP 3-bit register, which
are then compared with the internal counter┬ highest three bits. The result of this
comparison can be selected to clear the internal counter if the T1CCLR bit is set to
zero. Setting the T1CCLR bit to zero ensures that a compare match with the CCRP
values will reset the internal counter. As the CCRP bits are only compared with the
highest three counter bits, the compare values exist in 128 clock cycle multiples.
Clearing all three bits to zero is in effect allowing the counter to overflow at its
maximum value.
●
TM1C1 Register - 10-bit ETM
Bit
7
6
5
4
3
2
1
0
Name
T1AM1
T1AM0
T1AIO1
T1AIO0
T1AOC
T1APOL
T1CDN
T1CCLR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
POR
0
0
0
0
0
0
0
0
Bit 7~6
T1AM1~T1AM0: Select TM1 CCRA Operating Mode
00: Compare Match Output Mode
01: Capture Input Mode
10: PWM Mode or Single Pulse Output Mode
11: Timer/Counter Mode
These bits setup the required operating mode for the TM. To ensure reliable operation
the TM should be switched off before any changes are made to the T1AM1 and
T1AM0 bits. In the Timer/Counter Mode, the TM output pin control must be disabled.
Bit 5~4
T1AIO1~T1AIO0: Select TP1A output function
Compare Match Output Mode
00: No change
01: Output low
10: Output high
11: Toggle output
PWM Mode/ Single Pulse Output Mode
00: PWM Output inactive state
01: PWM Output active state
10: PWM output
11: Single pulse output



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