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HT67F60 Datasheet(PDF) 131 Page - Holtek Semiconductor Inc |
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HT67F60 Datasheet(HTML) 131 Page - Holtek Semiconductor Inc |
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131 / 242 page  HT67F30/HT67F40/HT67F50/HT67F60 TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPROM Rev. 1.50 130 March 06 , 2012 Rev. 1.50 131 March 06 , 2012 Enhanced Type TM – ETM The Enhanced Type TM contains five operating modes, which are Compare Match Output, Timer/ Event Counter, Capture Input, Single Pulse Output and PWM Output modes. The Enhanced TM can also be controlled with an external input pin and can drive three or four external output pins. CTM Name TM No. TM Input Pin TM Output Pin HT67F30 10-bit ETM 1 TCK1 TP1A; TP1B_0, TP1B_1 HT67F40 10-bit ETM 1 TCK1 TP1A, TP1B_0, TP1B_1, TP1B_2 HT67F50 10-bit ETM 1 TCK1 TP1A, TP1B_0, TP1B_1, TP1B_2 HT67F60 10-bit ETM 1 TCK1 TP1A, TP1B_0, TP1B_1, TP1B_2 Enhanced TM Operation At its core is a 10-bit count-up/count-down counter which is driven by a user selectable internal or external clock source. There are three internal comparators with the names, Comparator A, Comparator B and Comparator P. These comparators will compare the value in the counter with the CCRA, CCRB and CCRP registers. The CCRP comparator is 3-bits wide whose value is compared with the highest 3-bits in the counter while CCRA and CCRB are 10-bits wide and therefore compared with all counter bits. The only way of changing the value of the 10-bit counter using the application program, is to clear the counter by changing the TnON bit from low to high. The counter will also be cleared automatically by a counter overflow or a compare match with one of its associated comparators. When these conditions occur, a TM interrupt signal will also usually be generated. The Enhanced Type TM can operate in a number of different operational modes, can be driven by different clock sources including an input pin and can also control output pins. All operating setup conditions are selected using relevant internal registers. CCRP CCRA Tn CC LR Co mp ar at or P M at ch Co mp ar at or A Ma tc h Tn CK 2~ Tn CK 0 Tn ON Tn PAU b7 ~b 9 3- bi t Co m par at or P 10 -b it Co mp ar at or A Co unt er Cl ea r 10 -b it Up /D ow n Co unt er Tn PF I nt e rru pt Tn AF In te rru pt TP nA P in I npu t/ Ou tp u t b0 ~b 9 E dge De te ct or Tn AI O1 , Tn AI O0 Tn AM 1, T nA M0 Tn AI O1 , Tn AI O0 Tn APO L Tn AO C Po la ri ty Co nt ro l Ou tp u t Co nt ro l TP nA TC Kn 11 1 00 0 00 1 01 0 01 1 10 0 10 1 11 0 f SYS /4 f SYS f H /1 6 f H /6 4 f TB C Re se rv ed Tn BF In te rru pt TP nB P in I npu t/ Ou tp u t Tn BM 1, T nB M0 Tn BI O1 , Tn BI O0 Tn BPO L Tn BO C Po la ri ty Co nt ro l Ou tp u t Co nt ro l CCRB Co mp ar at or B Ma tc h 10 -b it Co mp ar at or B E dge De te ct or Tn IO 1, T nI O0 TP nB -0 TP nB -1 TP nB -2 0 1 Enhanced Type TM Block Diagram |
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