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HT67F60 Datasheet(PDF) 128 Page - Holtek Semiconductor Inc

Part # HT67F60
Description  TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPROM
PDF  242 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT67F60 Datasheet(HTML) 128 Page - Holtek Semiconductor Inc

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Rev. 1.50
128
March 06 , 2012
Rev. 1.50
129
March 06 , 2012
HT67F30/HT67F40/HT67F50/HT67F60
TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPRO
Counter Value
CCRP
CCRA
TnON
TnPAU
TnPOL
CCRP Int.
Flag TnPF
CCRA Int.
Flag TnAF
TM O/P Pin
(TnOC=1)
Time
Counter cleared
by CCRA
Pause Resume
Counter Stop if
TnON bit low
Counter Reset when
TnON returns high
TnDPX = 1; TnM [1:0] = 10
PWM Duty Cycle
set by CCRP
PWM resumes
operation
Output controlled by
other pin-shared function
Output Inverts
when TnPOL = 1
PWM Period
set by CCRA
TM O/P Pin
(TnOC=0)
PWM Mode — TnDPX = 1
Note: 1. Here TnDPX=1 – Counter cleared by CCRA
2. A counter clear sets the PWM Period
3. The internal PWM function continues even when TnIO [1:0] = 00 or 01
4. The TnCCLR bit has no influence on PWM operation
Single Pulse Mode
To select this mode, bits TnM1 and TnM0 in the TMnC1 register should be set to 10 respectively
and also the TnIO1 and TnIO0 bits should be set to 11 respectively. The Single Pulse Output Mode,
as the name suggests, will generate a single shot pulse on the TM output pin.
The trigger for the pulse output leading edge is a low to high transition of the TnON bit, which can
be implemented using the application program. However in the Single Pulse Mode, the TnON bit
can also be made to automatically change from low to high using the external TCKn pin, which will
in turn initiate the Single Pulse output. When the TnON bit transitions to a high level, the counter
will start running and the pulse leading edge will be generated. The TnON bit should remain high
when the pulse is in its active state. The generated pulse trailing edge will be generated when the
TnON bit is cleared to zero, which can be implemented using the application program or when a
compare match occurs from Comparator A.
Lead in g Ed ge
Tn ON b it
0 ® 1
S/ W Co mm and
SE T "T nO N"
or
TC Kn P in T r ans it io n
Tn ON b it
1 ® 0
S/ W Co mm and
CL R "T nO N"
or
CCR A Ma tc h C om par e
Pu ls e Wi dt h = CCRA V al ue
Tr ai li ng E dge
TM n Ou t put P in
Single Pulse Generation



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