EDJ8232B5MB datasheet(83/142 Pages) ELPIDA

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EDJ8232B5MB

Data Sheet E1825E30 (Ver. 3.0)

[Self-Refresh Mode Summary]

MR2

Self-refresh operation

Allowed operating temperature range

for self-refresh mode

Self-refresh rate appropriate for the Normal Temperature Range

Normal (0

C to +85C)

Self-refresh rate appropriate for either the Normal or Extended

Temperature Ranges. The DRAM must support Extended

Temperature Range. The value of the SRT bit can effect self-

refresh power consumption, please refer to the Self- refresh

Current for details.

Normal and Extended (0

C to +95C)

ASR enabled (for devices supporting ASR and Normal

Temperature Range). Self-refresh power consumption is

temperature dependent

Normal (0

C to +85C)

ASR enabled (for devices supporting ASR and Extended

Temperature Range). Self-refresh power consumption is

temperature dependent

Normal and Extended (0

C to +95C)

Illegal

Dynamic ODT (Rtt_WR)

DDR3 SDRAM introduces a new feature “Dynamic ODT”. In certain application cases and to further enhance signal

integrity on the data bus, it is desirable that the termination strength of the DDR3 SDRAM can be changed without

issuing an MRS command.

MR2 register locations A9 and A10 configure the Dynamic ODT settings. In write

leveling mode, only RTT_Nom is available. For details on Dynamic ODT operation, refer to “Dynamic ODT”.

EDJ8232B5MB Datasheet(PDF) 83 Page - Elpida Memory