MMA8653FC datasheet(18/56 Pages) FREESCALE

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MMA8653FC

Sensors

Freescale Semiconductor, Inc.

Next the Master (or MCU) transmits the address of the register to read, and the MMA8653FC sends an

acknowledgement.

The Master (or MCU) transmits a repeated start condition (SR) and then addresses the MMA8653FC (0x1D), with the R/

W bit set to “1” for a read from the previously selected register.

The Slave then acknowledges and transmits the data from the requested register. The Master does not acknowledge

(NAK) the transmitted data, but transmits a stop condition to end the data transfer.

Figure 11. Single Byte Read timing (I2C)

For the following subsections, use the following legend.

5.8.2

Multiple byte read

(See Table 11, “I2C Device address sequence" for next auto-increment address.)

When performing a multi-byte read or “burst read”, the MMA8653FC automatically increments the received register

address commands after a read command is received.

After following the steps of a single byte read, multiple bytes of data can be read from sequential registers after each

MMA8653FC acknowledgment (AK) is received,

Until a no acknowledge (NAK) occurs from the Master,

Followed by a stop condition (SP), which signals the end of transmission.

Figure 12. Multiple Byte Read timing (I2C)

5.8.3

Single byte write

To start a write command, the Master transmits a start condition (ST) to the MMA8653FC, slave address ($1D) with the

R/W bit set to “0” for a write,

The MMA8653FC sends an acknowledgement.

Next the Master (MCU) transmits the address of the register to write to, and the MMA8653FC sends an

acknowledgement.

Then the Master (or MCU) transmits the 8-bit data to write to the designated register, and the MMA8653FC sends an

acknowledgement that it has received the data. Because this transmission is complete, the Master transmits a stop

condition (SP) to the data transfer. The data sent to the MMA8653FC is now stored in the appropriate register.

Master

ST Device Address[7:1]

Address[7:0]

SR Device Address[7:1]

NAK

Slave

Data[7:0]

Legend

ST: Start Condition

SP: Stop Condition

NAK: No Acknowledge

W: Write = 0

SR: Repeated Start Condition

AK: Acknowledge

R: Read = 1

Master

Device Address[7:1]

SR Device Address[7:1] R

Slave

Data[7:0]

Master

NAK

Slave

Data[7:0]

Master

ST Device Address[7:1]

Data[7:0]

Slave

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