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IOUT1

IOUT2

3.3V

AV

DD

3.3V

AV

DD

100

Ω

100

Ω

4:1

R

LOAD

50

Ω

15 Ω

DAC5675-EP

(a)

3.3V

AV

DD

3.3V

AV

DD

25

Ω

25

Ω

V

V

Optional, for single-

ended output

referred to AV

DD

IOUT1

IOUT2

C

FB

IOUT1

IOUT2

3.3V

200

Ω (R

(b)

DAC5675-EP

DAC5675-EP

Sleep Mode

DAC5675-EP

SGLS381A – OCTOBER 2006 – REVISED OCTOBER 2006

APPLICATION INFORMATION (continued)

Figure 23. Driving a Doubly-Terminated 50-

Ω Cable Using a 4:1 Impedance Ratio Transformer

Figure 24(a) shows the typical differential output configuration with two external matched resistor loads. The

nominal resistor load of 25

Ω gives a differential output swing of 1 V

20-mA full-scale output current. The output impedance of the DAC5675 slightly depends on the output voltage at

nodes IOUT1 and IOUT2. Consequently, for optimum dc-integral nonlinearity, the configuration of Figure 24(b)

the current sources switched to IOUT1. The amplifier maximum output swing and the full-scale output current of

DAC5675 current output, thereby reducing the operational amplifier slew-rate requirements. In this configuration,

the operational amplifier should operate at a supply voltage higher than the resistor output reference voltage

single-ended unipolar output is desired.

Figure 24. Output Configurations

The DAC5675 features a power-down mode that turns off the output current and reduces the supply current to

approximately 6 mA. The power-down mode is activated by applying a logic level one to the SLEEP pin, pulled

down internally.

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