WM9712CLGEFLSLASHV datasheet(54/78 Pages) WOLFSON

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WM9712L

Production Data

PD, Rev 4.6, November 2011

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

56h

GPIO pins

function

select

GE2

GPIO2 / IRQ output select

0: Pin 45 disconnected from GPIO logic

set 4Ch, bit 2 to ‘0’ to output IRQ signal

1: Pin 45 connected to GPIO logic (IRQ disabled)

GE3

GPIO3 / PENDOWN output select

0: Pin 46 disconnected from GPIO logic

set 4Ch, bit 3 to ‘0’ to output PENDOWN signal

1: Pin 46 connected to GPIO logic

GE4

GPIO4 / ADA / MASK output select

0: Pin 47 disconnected from GPIO logic

set 4Ch, bit 4 to ‘0’ to output ADA signal

set 4Ch, bit 4 to ‘1’ to input MASK signal

1: Pin 47 connected to GPIO logic

GE5

GPIO5 / SPDIF output select

0: Pin 48 = SPDIF (disconnected from GPIO logic)

set 4Ch, bit 5 to ‘0’ to output SPDIF signal

1: Pin 48 connected to GPIO logic (SPDIF

disabled)

Table 39 Using GPIO Pins for Non-GPIO Functions

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

58h

Additional

Functional

Control

IRQ INV

Inverts the IRQ signal (pin 45)

0: IRQ signal not inverted

1: IRQ signal inverted

WAKEEN

Enables GPIO wake-up

0: Disabled

1: Enabled

Table 40 Additional Functionality for GPIO Pins

WM9712CLGEFL/V Datasheet(PDF) 54 Page - Wolfson Microelectronics plc

WM9712CLGEFL/V Datasheet(HTML) 54 Page - Wolfson Microelectronics plc

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