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WM8310 Datasheet(PDF) 64 Page - Wolfson Microelectronics plc |
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WM8310 Datasheet(HTML) 64 Page - Wolfson Microelectronics plc |
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64 / 291 page ![]() WM8310 Pre-Production w PP, May 2012, Rev 3.1 64 has been loaded from the ICE, and the OTP auto-programming option is selected (see above), then the value of the OTP_CUST_FINAL bit will be copied from the ICE memory to the OTP memory. The above registers are defined in Table 29. ADDRESS BIT LABEL DEFAULT DESCRIPTION R30736 (7810h) Customer OTP ID 15 OTP_AUTO_ PROG 0 If this bit is set when bootstrap data is loaded from ICE (in development mode), then the ICE contents will be programmed in the OTP. 14:1 OTP_CUST_ ID [13:0] 0000h This field is checked when an ‘ON’ transition is requested. A non-zero value is used to confirm valid data. 0 OTP_CUST_ FINAL 0 If OTP_CUST_FINAL is set in the OTP and also set in the DCRW, then no further Writes are possible to the OTP. Table 29 OTP Registers - DCRW Page 2 The remaining contents of DCRW Page 2 include the registers listed in Table 30, which are defined in other sections of this datasheet. REGISTER FUNCTION REFERENCE DC1_ON_SLOT [2:0] DC-DC Converter 1 See Section 15.12.2 DC1_FREQ [1:0] See Section 15.12.2 DC1_PHASE See Section 15.12.2 DC1_ON_VSEL [6:2] See Section 15.12.2 DC1_CAP [1:0] See Section 15.12.2 DC2_ON_SLOT [2:0] DC-DC Converter 2 See Section 15.12.2 DC2_FREQ [1:0] See Section 15.12.2 DC2_PHASE See Section 15.12.2 DC2_ON_VSEL [6:2] See Section 15.12.2 DC2_CAP [1:0] See Section 15.12.2 DC3_ON_SLOT [2:0] DC-DC Converter 3 See Section 15.12.2 DC3_PHASE See Section 15.12.2 DC3_ON_VSEL [6:2] See Section 15.12.2 DC3_CAP [1:0] See Section 15.12.2 LDO1_ON_SLOT [2:0] LDO Regulator 1 See Section 15.12.4 LDO1_ON_VSEL [4:0] See Section 15.12.4 LDO2_ON_SLOT [2:0] LDO Regulator 2 See Section 15.12.4 LDO2_ON_VSEL [4:0] See Section 15.12.4 LDO3_ON_SLOT [2:0] LDO Regulator 3 See Section 15.12.4 LDO3_ON_VSEL [4:0] See Section 15.12.4 LDO4_ON_SLOT [2:0] LDO Regulator 4 See Section 15.12.4 LDO4_ON_VSEL [4:0] See Section 15.12.4 LDO5_ON_SLOT [2:0] LDO Regulator 5 See Section 15.12.4 LDO5_ON_VSEL [4:0] See Section 15.12.4 LDO6_ON_SLOT [2:0] LDO Regulator 6 See Section 15.12.4 LDO6_ON_VSEL [4:0] See Section 15.12.4 LDO7_ON_SLOT [2:0] LDO Regulator 7 See Section 15.12.4 LDO7_ON_VSEL [4:0] See Section 15.12.4 LDO8_ON_SLOT [2:0] LDO Regulator 8 See Section 15.12.4 LDO8_ON_VSEL [4:0] See Section 15.12.4 Table 30 DCRW Page 2 |
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