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MPXD2005VMM80R Datasheet(PDF) 86 Page - Freescale Semiconductor, Inc |
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MPXD2005VMM80R Datasheet(HTML) 86 Page - Freescale Semiconductor, Inc |
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86 / 119 page  PXS20 Microcontroller Data Sheet, Rev. 1 Preliminary—Subject to Change Without Notice Electrical characteristics Freescale Semiconductor 86 × 3.13 FMPLL electrical characteristics Table 20. Main oscillator electrical characteristics Symbol Parameter Conditions1 1 V DD = 3.3 V ±10%, TJ = –40 to +150 °C, unless otherwise specified. Value Unit Min Typ Max fXOSCHS SR Oscillator frequency — 4.0 — 40.0 MHz gmXOSCHS P Oscillator transconductance VDD = 3.3 V ±10% 4.5 — 13.25 mA/V VXOSCHS D Oscillation amplitude fOSC = 4, 8, 10, 12, 16 MHz 1.3 — — V fOSC =40MHz 1.1 — — VXOSCHSOP D Oscillation operating point — — 0.82 — V IXOSCHS D Oscillator consumption — — — 3.5 mA TXOSCHSSU T Oscillator start-up time fOSC = 4, 8, 10, 12 MHz 2 2 The recommended configuration for maximizing the oscillator margin are: XOSC_MARGIN = 0 for 4 MHz quartz XOSC_MARGIN = 1 for 8/16/40 MHz quartz —— 6 ms fOSC =16, 40 MHz 2 —— 2 VIH SR Input high level CMOS Schmitt Trigger Oscillator bypass mode 0.65 × VDD —VDD +0.4 V VIL SR Input low level CMOS Schmitt Trigger Oscillator bypass mode –0.4 — 0.35 × VDD V Table 21. FMPLL electrical characteristics Symbol Parameter Conditions Min Typ Max Unit fREF_CRYSTAL fREF_EXT D FMPLL reference frequency range1 Crystal reference 4 — 40 MHz fPLL_IN D Phase detector input frequency range (after pre-divider) —4 — 16 MHz fFMPLLOUT D Clock frequency range in normal mode —4 — 1202 MHz fFREE P Free running frequency Measured using clock division (typically 16) 20 — 150 MHz fsys D On-chip FMPLL frequency2 — 16 — 120 MHz tCYC D System clock period — — — 1 / fsys ns fLORL fLORH D Loss of reference frequency window3 Lower limit 1.6 — 3.7 MHz Upper limit 24 — 56 fSCM D Self-clocked mode frequency4,5 —20 — TBD MHz tLOCK P Lock time Stable oscillator (fPLLIN = 4 MHz), stable VDD — — 200 µs |
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