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MPXD2005VMM80R Datasheet(PDF) 16 Page - Freescale Semiconductor, Inc

Part # MPXD2005VMM80R
Description  PXS20 Microcontroller
PDF  119 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPXD2005VMM80R Datasheet(HTML) 16 Page - Freescale Semiconductor, Inc

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PXS20 Microcontroller Data Sheet, Rev. 1
Preliminary—Subject to Change Without Notice
Introduction
Freescale Semiconductor
16
•
Short latency time due to an arbitration scheme for high-priority messages
•
Transmit features
— Supports configuration of multiple mailboxes to form message queues of scalable depth
— Arbitration scheme according to message ID or message buffer number
— Internal arbitration to guarantee no inner or outer priority inversion
— Transmit abort procedure and notification
•
Receive features
— Individual programmable filters for each mailbox
— 8 mailboxes configurable as a 6-entry receive FIFO
— 8 programmable acceptance filters for receive FIFO
•
Programmable clock source
— System clock
— Direct oscillator clock to avoid FMPLL jitter
1.5.27
FlexRay
The FlexRay module provides the following features:
•
Full implementation of FlexRay Protocol Specification 2.1 Rev. A
•
64 configurable message buffers can be handled
•
Dual channel or single channel mode of operation, each as fast as 10 Mbit/s data rate
•
Message buffers configurable as transmit or receive
•
Message buffer size configurable
•
Message filtering for all message buffers based on Frame ID, cycle count, and message ID
•
Programmable acceptance filters for receive FIFO
•
Message buffer header, status, and payload data stored in system memory (SRAM)
•
Internal FlexRay memories have error detection and correction
1.5.28
Serial Communication Interface Module (UART)
The UART module with DMA support on this device features the following:
•
UART features:
— Full-duplex operation
— Standard non return-to-zero (NRZ) mark/space format
— Data buffers with 4-byte receive, 4-byte transmit
— Configurable word length (8-bit or 9-bit words)
— Error detection and flagging
–
Parity, noise and framing errors
— Interrupt driven operation with 4 interrupts sources
— Separate transmitter and receiver CPU interrupt sources
— 16-bit programmable baud-rate modulus counter and 16-bit fractional
— 2 receiver wake-up methods
•
LIN features:
— Autonomous LIN frame handling
— Message buffer to store identifier and up to eight data bytes
— Supports message length of up to 64 bytes
— Detection and flagging of LIN errors



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