ATSAM4SD16BA-MU datasheet(44/67 Pages) ATMEL

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11100BS–ATARM–31-Jul-12

SAM4S Series [Preliminary]

Figure 10-3. Power Management Controller Block Diagram

The SysTick calibration value is fixed at 12500, which allows the generation of a time base of

1 ms with SysTick clock at 12.5 MHz (max HCLK/8 = 100 MHz/8 = 12500, so STCALIB =

0x30D4).

10.7

Watchdog Timer

• 16-bit key-protected only-once Programmable Counter

• Windowed, prevents the processor to be in a deadlock on the watchdog access

10.8

SysTick Timer

• 24-bit down counter

• Self-reload capability

• Flexible System timer

MCK

periph_clk[..]

int

SLCK

MAINCK

PLLACK

Prescaler

/1,/2,/4,...,/64

HCK

Processor

Clock

Controller

Sleep Mode

Master Clock Controller

Peripherals

Clock Controller

ON/OFF

USB Clock Controller

SLCK

MAINCK

PLLACK

Prescaler

/1,/2,/4,...,/64

Programmable Clock Controller

PLLBCK

pck[..]

PLLBCK

UDPCK

ON/OFF

FCLK

SystTick

Divider

ATSAM4SD16BA-MU Datasheet(PDF) 44 Page - ATMEL Corporation

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