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DSPIC30F4012 Datasheet(PDF) 204 Page - Microchip Technology |
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DSPIC30F4012 Datasheet(HTML) 204 Page - Microchip Technology |
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204 / 238 page ![]() dsPIC30F4011/4012 DS70135G-page 204 © 2010 Microchip Technology Inc. FIGURE 24-17: SPI MODULE MASTER MODE (CKE =1) TIMING CHARACTERISTICS SCK1 (CKP = 0) SCK1 (CKP = 1) SDO1 SDI1 SP36 SP30,SP31 SP35 MSb Bit 14 - - - - - -1 LSb In Bit 14 - - - -1 LSb Note: Refer to Figure 24-2 for load conditions. SP11 SP10 SP21 SP20 SP41 SP20 SP21 MSb In SP40 TABLE 24-33: SPI MODULE MASTER MODE (CKE = 1) TIMING REQUIREMENTS AC CHARACTERISTICS Standard Operating Conditions: 2.5V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤TA ≤+85°C for Industrial -40°C ≤TA ≤+125°C for Extended Param No. Symbol Characteristic(1) Min Typ(2) Max Units Conditions SP10 TscL SCK1 Output Low Time(3) TCY/2 — — ns SP11 TscH SCK1 Output High Time(3) TCY/2 — — ns SP20 TscF SCK1 Output Fall Time(4) — — — ns See parameter DO32 SP21 TscR SCK1 Output Rise Time(4) — — — ns See parameter DO31 SP30 TdoF SDO1 Data Output Fall Time(4) — — — ns See parameter DO32 SP31 TdoR SDO1 Data Output Rise Time(4) — — — ns See parameter DO31 SP35 TscH2doV, TscL2doV SDO1 Data Output Valid after SCK1 Edge — — 30 ns SP36 TdoV2sc, TdoV2scL SDO1 Data Output Setup to First SCK1 Edge 30 — — ns SP40 TdiV2scH, TdiV2scL Setup Time of SDI1 Data Input to SCK1 Edge 20 — — ns SP41 TscH2diL, TscL2diL Hold Time of SDI1 Data Input to SCK1 Edge 20 — — ns Note 1: These parameters are characterized but not tested in manufacturing. 2: Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested. 3: The minimum clock period for SCK1 is 100 ns. Therefore, the clock generated in Master mode must not violate this specification. 4: Assumes 50 pF load on all SPI pins. |
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