DSPIC30F4012 datasheet(65/238 Pages) MICROCHIP

65 / 238 page

DS70135G-page 65

dsPIC30F4011/4012

8.3

Input Change Notification Module

The input change notification module provides the

dsPIC30F devices the ability to generate interrupt

requests to the processor in response to a change of

state on selected input pins. This module is capable of

detecting input change of states, even in Sleep mode,

when the clocks are disabled. There are 10 external

signals (CN0 through CN7, CN17 and CN18) that may

be selected (enabled) for generating an interrupt

request on a change of state.

Please refer to the pin diagrams for CN pin locations.

TABLE 8-3:

INPUT CHANGE NOTIFICATION REGISTER MAP (BITS 7-0)(1)

SFR Name

Addr.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset State

CNEN1

00C0

CN7IE

CN6IE

CN5IE

CN4IE

CN3IE

CN2IE

CN1IE

CN0IE

0000 0000 0000 0000

CNEN2

00C2

—

CN18IE(2)

CN17IE(2)

—

0000 0000 0000 0000

CNPU1

00C4

CN7PUE

CN6PUE

CN5PUE

CN4PUE

CN3PUE

CN2PUE

CN1PUE

CN0PUE

0000 0000 0000 0000

CNPU2

00C6

—

CN18PUE(2)

CN17PUE(2)

—

0000 0000 0000 0000

Legend:

= uninitialized bit; — = unimplemented bit, read as ‘0’

Note

Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.

These bits are not available on dsPIC30F4012 devices.

DSPIC30F4012 Datasheet(PDF) 65 Page - Microchip Technology

DSPIC30F4012 Datasheet(HTML) 65 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL