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DSPIC30F4012 Datasheet(PDF) 83 Page - Microchip Technology |
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DSPIC30F4012 Datasheet(HTML) 83 Page - Microchip Technology |
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83 / 238 page ![]() © 2010 Microchip Technology Inc. DS70135G-page 83 dsPIC30F4011/4012 12.3 Input Capture Interrupts The input capture channels have the ability to generate an interrupt, based upon the selected number of capture events. The selection number is set by control bits, ICI<1:0> (ICxCON<6:5>). Each channel provides an interrupt flag (ICxIF) bit. The respective capture channel interrupt flag is located in the corresponding IFSx register. Enabling an interrupt is accomplished via the respec- tive Capture Channel Interrupt Enable (ICxIE) bit. The capture interrupt enable bit is located in the corresponding IECx register. |
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