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STM32F101RF Datasheet(PDF) 97 Page - STMicroelectronics |
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STM32F101RF Datasheet(HTML) 97 Page - STMicroelectronics |
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97 / 108 page ![]() STM32F101xF, STM32F101xG Electrical characteristics Doc ID 17143 Rev 2 97/108 Figure 52. Power supply and reference decoupling (VREF+ connected to VDDA) 1. VREF+ and VREF- inputs are available only on 100-pin packages. 5.3.19 DAC electrical specifications VREF+/VDDA STM32F10xxx 1 µF // 10 nF VREF–/VSSA ai14381b Table 59. DAC characteristics Symbol Parameter Min Typ Max(1) Unit Comments VDDA Analog supply voltage 2.4 3.6 V VREF+ Reference supply voltage 2.4 3.6 V VREF+ must always be below VDDA VSSA Ground 0 0 V RLOAD (2) Resistive load with buffer ON 5 k RO (2) Impedance output with buffer OFF 15 k When the buffer is OFF, the minimum resistive load between DAC_OUT and VSS to have a 1% accuracy is 1.5 M CLOAD (2) Capacitive load 50 pF Maximum capacitive load at DAC_OUT pin (when the buffer is ON). DAC_OUT min(2) Lower DAC_OUT voltage with buffer ON 0.2 V It gives the maximum output excursion of the DAC. It corresponds to 12-bit input code (0x0E0) to (0xF1C) at VREF+ = 3.6 V and (0x155) and (0xEAB) at VREF+ = 2.4 V. DAC_OUT max(2) Higher DAC_OUT voltage with buffer ON VDDA – 0.2 V DAC_OUT min(2) Lower DAC_OUT voltage with buffer OFF 0.5 mV It gives the maximum output excursion of the DAC. DAC_OUT max(2) Higher DAC_OUT voltage with buffer OFF VREF+ – 1LSB V |
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