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M68HC08 Datasheet(PDF) 42 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 42 Page - Freescale Semiconductor, Inc |
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42 / 332 page ![]() Memory Map Technical Data MC68HC908JB16 — Rev. 1.1 42 Memory Map Freescale Semiconductor 2.4 Reserved Memory Locations Accessing a reserved location can have unpredictable effects on MCU operation. In the Figure 2-1 and in register figures in this document, reserved locations are marked with the word Reserved or with the letter R. 2.5 Input/Output (I/O) Section Most of the control, status, and data registers are in the zero page area of $0000–$007F. Additional I/O registers have these addresses: • $FE00; SIM break status register, SBSR • $FE01; SIM reset status register, SRSR • $FE02; Reserved • $FE03; SIM break flag control register, SBFCR • $FE04; Interrupt status register 1, INT1 • $FE05; Interrupt status register 2, INT2 • $FE06; Reserved • $FE07; Reserved • $FE08; FLASH control register, FLCR • $FE09; FLASH block protect register, FLBPR • $FE0A; Reserved • $FE0B; Reserved • $FE0C; Break address register high, BRKH • $FE0D; Break address register low, BRKL • $FE0E; Break status and control register, BRKSCR • $FE0F; Reserved • $FFFF; COP control register, COPCTL Data registers are shown in Figure 2-2. Table 2-1 is a list of vector locations. |
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