DM163006 datasheet(74/320 Pages) MICROCHIP

74 / 320 page

PIC18C601/801

DS39541A-page 74

Advance Information

 2001 Microchip Technology Inc.

6.1

Control Registers

Several control registers are used in conjunction with

the TBLRD and TBLWT instructions. These include:

• TABLAT register

• TBLPTR registers

6.1.1

TABLAT - TABLE LATCH REGISTER

The Table Latch (TABLAT) is an 8-bit register mapped

into the SFR space. The Table Latch is used to hold

8-bit data during data transfers between program mem-

ory and data memory.

6.1.2

TBLPTR - TABLE POINTER

The Table Pointer (TBLPTR) addresses a byte within

the program memory. The TBLPTR is comprised of

three SFR registers (Table Pointer Upper byte, High

byte

and

Low

byte).

These

three

registers

(TBLPTRU:TBLPTRH:TBLPTRL) join to form a 21-bit

wide pointer. The 21-bits allow the device to address up

to 2 Mbytes of program memory space.

The table pointer TBLPTR is used by the TBLRD and

TBLWRT

instructions. These instructions can update

the TBLPTR in one of four ways, based on the table

operation. These operations are shown in Table 6-1.

These operations on the TBLPTR only affect the low

order 21-bits.

TABLE 6-1:

TABLE POINTER OPERATIONS WITH TBLRD AND TBLWT INSTRUCTIONS

Example

Operation on Table Pointer

TBLRD*

TBLWT*

TBLPTR is not modified

TBLRD*+

TBLWT*+

TBLPTR is incremented after the read/write

TBLRD*-

TBLWT*-

TBLPTR is decremented after the read/write

TBLRD+*

TBLWT+*

TBLPTR is incremented before the read/write

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