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PCF8537 Datasheet(PDF) 55 Page - NXP Semiconductors |
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PCF8537 Datasheet(HTML) 55 Page - NXP Semiconductors |
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55 / 82 page ![]() PCF8537 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 1 — 31 May 2012 55 of 82 NXP Semiconductors PCF8537 Industrial LCD driver for multiplex rates up to 1:8 9.2.6 Input filters To enhance noise immunity in electrically adverse environments, RC low-pass filters are provided on the SDA and SCL lines. 9.2.7 I2C-bus slave address The device selection depends on the I2C-bus slave address. Two different I2C-bus slave addresses can be used to address the PCF8537AH (see Table 31). Bit 1 of the slave address is defined by connecting the input A0 to either VSS (logic 0) or VDD (logic 1). Therefore, two instances of PCF8537AH can be distinguished on the same I2C-bus. The least significant bit of the slave address byte is bit R/W (see Table 32). [1] Only used for temperature readout from PCF8537AH (see Table 20 on page 15). 9.2.8 I2C-bus protocol The I2C-bus protocol is shown in Figure 46. The sequence is initiated with a START condition (S) from the I2C-bus master which is followed by one of the two PCF8537AH slave addresses available. All PCF8537AH’s with the corresponding A0 level acknowledge in parallel to the slave address, but all PCF8537AH with an alternative A0 level ignore the whole I2C-bus transfer. After acknowledgement, a control byte follows (see Section 9.1 on page 52). Table 31. I2C slave address byte Slave address Bit 7 6 5 4 3 2 1 0 MSB LSB 011 100 A0 R/W Table 32. R/W bit description Symbol Value Description R/W data read or write selection 0 write data 1 read data[1] |
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