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PCF8537 Datasheet(PDF) 67 Page - NXP Semiconductors |
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PCF8537 Datasheet(HTML) 67 Page - NXP Semiconductors |
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67 / 82 page ![]() PCF8537 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 1 — 31 May 2012 67 of 82 NXP Semiconductors PCF8537 Industrial LCD driver for multiplex rates up to 1:8 13. Dynamic characteristics [1] Frequency present on OSCCLK with default display frequency division factor. Table 37. Dynamic characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 9.0 V; Tamb = 40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit fclk(ext) external clock frequency 450 - 14500 Hz tclk(H) clock HIGH time external clock source used 33 - - s tclk(L) clock LOW time 33 - - s fclk clock frequency on pin CLK; see Table 17 [1] 7800 9600 11040 Hz tw(rst)L LOW-level reset time 400 - - ns Fig 58. Driver timing waveforms Fig 59. RESET timing 013aaa296 CLK tclk(H) tclk(L) 1/fclk 0.7 VDD 0.3 VDD 013aaa665 RESET tw(rst)L 0.3 VDD |
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