AD5381BSTZ-5 datasheet(22/40 Pages) AD

22 / 40 page

AD5381

Data Sheet

Rev. D | Page 22 of 40

ON-CHIP SPECIAL FUNCTIONREGISTERS (SFR)

The AD5381 contains a number of special function registers

(SFRs), as outlined in Table 14. SFRs are addressed with

REG1 = REG0 = 0 and are decoded using Address Bits

A5 to A0.

Table 14. SFR Register Functions (REG1 = 0, REG0= 0)

R/W A5 A4 A3 A2 A1 A0 Function

NOP (No Operation)

Write CLR Code

Soft CLR

Soft Power-Down

Soft Power-Up

Control Register Write

Control Register Read

Monitor Channel

Soft Reset

SFR COMMANDS

NOP (No Operation)

REG1 = REG0 = 0, A5 to A0 = 000000

Performs no operation but is useful in serial readbackmodeto

clock out data on D

OUT for diagnostic purposes.

BUSY pulses

low during a NOP operation.

Write CLR Code

REG1 = REG0 = 0, A5 to A0 = 000001

DB11 to DB0 = Contain the CLR data

Bringing the CLR line low or exercising the soft clear function

will load the contents of the DACregisters with the data con-

tained in the user configurable CLR register, andwill set

VOUT0 to VOUT39 accordingly. This can be very useful for

setting up a specific output voltage in a clear condition. It is also

beneficial for calibration purposes; the user can load full scale

or zero scale to the clear code register and then issue a hard-

ware or software clear to load this code to all DACs, removing

the need for individual writes to each DAC.Default on power-

up is all zeros.

Soft CLR

REG1 = REG0 = 0, A5 to A0 = 000010

DB11 to DB0 = Don’t Care

Executing this instruction performs the CLR, which is func-

tionally the same as that provided by the external CLR pin. The

DAC outputs areloaded with the data in the CLR code register.

It takes 35 µs to fully execute the SOFT CLR, as indicated by the

BUSY low time.

Soft Power-Down

REG1 = REG0 = 0, A5 to A0 = 001000

DB11 to DB0 = Don’t Care

Executing this instruction performs a global power-down

feature that puts all channels into a low powermodethat

reduces the analog supply current to 2 µA max and the digi-

tal current to 20 µA max. In power-down mode, the output

amplifier can be configured as a high impedance output or

provide a 100 kΩ load to ground. The contentsof all internal

registers are retained in power-down mode. No registercan be

written to while in power-down.

Soft Power-Up

REG1 = REG0 = 0, A5 to A0 = 001001

DB11 to DB0 = Don’t Care

This instruction is used to power up the output amplifiers and

the internal reference. The time to exit power-down is 8 µs.

The hardwarepower-downand softwarefunction are internally

combined in a digital OR function.

Soft RESET

REG1 = REG0 = 0, A5 to A0 = 001111

DB11 to DB0 = Don’t Care

This instruction is used to implement a softwarereset. All

internal registers arereset to their default values, which corre-

spond to m at full scale and c at zero scale. The contents of the

DAC registers arecleared, setting all analog outputsto 0 V. The

soft reset activation time is 135 µs.

AD5381BSTZ-5 Datasheet(PDF) 22 Page - Analog Devices

AD5381BSTZ-5 Datasheet(HTML) 22 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

Datasheet Download

Link URL