PIC10LF322T-EMCSQTP datasheet(38/210 Pages) MICROCHIP

38 / 210 page

PIC10(L)F320/322

DS41585A-page 38

Preliminary

 2011 Microchip Technology Inc.

5.9

Determining the Cause of a Reset

Upon any Reset, multiple bits in the STATUS and

PCON register are updated to indicate the cause of the

Reset. Table 5-3 and Table 5-4 show the Reset condi-

tions of these registers.

TABLE 5-3:

RESET STATUS BITS AND THEIR SIGNIFICANCE

TABLE 5-4:

RESET CONDITION FOR SPECIAL REGISTERS

POR

BOR

Condition

0x1

Power-on Reset

u01

Brown-out Reset

uu0

WDT Reset

uu0

WDT Wake-up from Sleep

uuu

MCLR Reset during normal operation

uu1

MCLR Reset during Sleep

Condition

Program

Counter

STATUS

PCON

Power-on Reset

0000h

0001 1000

---- --0x

MCLR Reset during normal operation

0000h

000u uuuu

---- --uu

MCLR Reset during Sleep

0000h

0001 0uuu

---- --uu

WDT Reset

0000h

0000 uuuu

---- --uu

WDT Wake-up from Sleep

PC + 1

0000 0uuu

---- --uu

Brown-out Reset

0000h

0001 1uuu

---- --u0

Interrupt Wake-up from Sleep

PC + 1(1)

0001 0uuu

---- --uu

Legend: u

= unchanged, x = unknown, - = unimplemented bit, reads as ‘0’.

Note 1:

When the wake-up is due to an interrupt and Global Enable bit (GIE) is set, the return address is pushed on

the stack and PC is loaded with the interrupt vector (0004h) after execution of PC + 1.

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