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FG484 Datasheet(PDF) 30 Page - Microsemi Corporation

Part # FG484
Description  ProASIC3E Flash Family FPGAs with Optional Soft ARM Support
PDF  162 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

FG484 Datasheet(HTML) 30 Page - Microsemi Corporation

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ProASIC3E DC and Switching Characteristics
2-16
Revision 13
Overview of I/O Performance
Summary of I/O DC Input and Output Levels – Default I/O Software
Settings
Table 2-13 • Summary of Maximum and Minimum DC Input and Output Levels
Applicable to Commercial and Industrial Conditions
I/O Standard
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option1
Slew
Rate
VIL
VIH
VOL
VOH
IOL3 IOH3
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmA mA
3.3V LVTTL/
3.3 V
LVCMOS
12 mA
12 mA
High –0.3
0.8
2
3.6
0.4
2.4
12
12
3.3 V
LVCMOS
Wide Range
100 µA
12 mA
High –0.3
0.8
2
3.6
0.2
VCCI – 0.2 0.1 0.1
2.5 V
LVCMOS
12 mA
12 mA
High –0.3
0.7
1.7
3.6
0.7
1.7
12
12
1.8 V
LVCMOS
12 mA
12 mA
High –0.3 0.35 * VCCI 0.65 * VCCI 3.6
0.45
VCCI – 0.45 12
12
1.5 V
LVCMOS
12 mA
12 mA
High –0.3 0.30 * VCCI 0.7 * VCCI
3.6 0.25 * VCCI 0.75 * VCCI 12
12
3.3 V PCI
Per PCI Specification
3.3 V PCI-X
Per PCI-X Specification
3.3 V GTL
20 mA2
20 mA2
High –0.3 VREF – 0.05 VREF + 0.05 3.6
0.4
–
20
20
2.5 V GTL
20 mA2
20 mA2
High –0.3 VREF – 0.05 VREF + 0.05 3.6
0.4
–
20
20
3.3 V GTL+
35 mA
35 mA
High –0.3 VREF – 0.1 VREF + 0.1 3.6
0.6
–
35
35
2.5 V GTL+
33 mA
33 mA
High –0.3 VREF – 0.1 VREF + 0.1 3.6
0.6
–
33
33
HSTL (I)
8 mA
8 mA
High –0.3 VREF – 0.1 VREF + 0.1 3.6
0.4
VCCI – 0.4
8
8
HSTL (II)
15 mA2
15 mA2
High –0.3 VREF – 0.1 VREF + 0.1 3.6
0.4
VCCI – 0.4
15
15
SSTL2 (I)
15 mA
15 mA
High –0.3 VREF – 0.2 VREF + 0.2 3.6
0.54
VCCI – 0.62 15
15
SSTL2 (II)
18 mA
18 mA
High –0.3 VREF – 0.2 VREF + 0.2 3.6
0.35
VCCI – 0.43 18
18
SSTL3 (I)
14 mA
14 mA
High –0.3 VREF – 0.2 VREF + 0.2 3.6
0.7
VCCI – 1.1
14
14
SSTL3 (II)
21 mA
21 mA
High –0.3 VREF – 0.2 VREF + 0.2 3.6
0.5
VCCI – 0.9
21
21
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 µA. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. Output drive strength is below JEDEC specification.
3. Currents are measured at 85°C junction temperature.
4. Output Slew Rates can be extracted from IBIS Models, located at
http://www.microsemi.com/soc/download/ibis/default.aspx.



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