FG484 datasheet(49/162 Pages) MICROSEMI

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ProASIC3E Flash Family FPGAs

Revision 13

2-35

1.5 V LVCMOS (JESD8-11)

Low-Voltage CMOS for 1.5 V is an extension of the LVCMOS standard (JESD8-5) used for general-

purpose 1.5 V applications. It uses a 1.5 V input buffer and a push-pull output buffer.

Table 2-41 • Minimum and Maximum DC Input and Output Levels

1.5 V

LVCMOS

VIL

VIH

VOL

VOH

IOL IOH IOSL

IOSH IIL1 IIH2

Drive

Strength

Min.

Max.

Min.

Max.

Min.

VmA mA

Max.

mA3

Max.

mA3 µA4 µA4

2 mA

–0.3 0.30 * VCCI 0.7 * VCCI

3.6

0.25 * VCCI

0.75 * VCCI

10 10

4 mA

–0.3 0.30 * VCCI 0.7 * VCCI

3.6

0.25 * VCCI

0.75 * VCCI

10 10

6 mA

–0.3 0.30 * VCCI 0.7 * VCCI

3.6

0.25 * VCCI

0.75 * VCCI

10 10

8 mA

–0.3 0.30 * VCCI 0.7 * VCCI

3.6

0.25 * VCCI

0.75 * VCCI

10 10

12 mA

–0.3 0.30 * VCCI 0.7 * VCCI

3.6

0.25 * VCCI

0.75 * VCCI

12 12

10 10

Notes:

1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V< VIN < VIL.

2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is

larger when operating outside recommended ranges.

3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.

4. Currents are measured at 85°C junction temperature.

5. Software default selection highlighted in gray.

Figure 2-10 • AC Loading

Table 2-42 • AC Waveforms, Measuring Points, and Capacitive Loads

Input Low (V)

Input High (V)

Measuring Point* (V)

VREF (typ.) (V)

CLOAD (pF)

1.5

0.75

–

Note: *Measuring point = Vtrip. See Table 2-15 on page 2-18 for a complete table of trip points.

Test Point

Enable Path

Datapath

35 pF

R = 1 k

R to VCCI for tLZ / tZL / tZLS

R to GND for tHZ / tZH / tZHS

35 pF for tZH / tZHS / tZL / tZLS

35 pF for tHZ / tLZ

FG484 Datasheet(PDF) 49 Page - Microsemi Corporation

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