AS3517H-ECTP datasheet(69/94 Pages) AMSCO

69 / 94 page

AS3517 V17

Data Sheet, Confidential

www.austriamicrosystems.com

Table 66 SPDIF Register

Name

Base

Default

OutContr2_SPDIF

2-wire serial

00h

SPDIF and Q24M Output Control Register

Offset: 12h-2

Adds status bits to the SPDIF bit-stream, configures the SPDIF output and the Q24M

pin (output of 24MHz oscillator)

This is an extended register and needs to be enabled by writing 010b to Reg. 18h first.

This register is reset at a DVDD-POR.

Bit

Bit Name

Default

Access

Bit Description

7:6

DRIVE_Q24M

R/W

Enables the Q24M output pin either to open-drain or push-pull

and sets various driving strengths

00: 12mA push-pull output

01: 12mA open-drain output

10: 4mA push-pull output

11: 2mA push-pull output

MUX_Q24M

R/W

Multiplexes various digital signals to the Q24M output pin

0: 24MHz oscillator clock

1: PLL output clock

SPDIF_COPY_OK

SPDIF copy control bit

0: copy not permitted

1: copy permitted

SPDIF_MCLK_INV

SPDIF master clock control bit

0: master clock

1: master clock inverted

SPDIF_INVALID

SPDIF sample status bit

0: sample valid

1: sample invalid

1:0

SPDIF_CNTR

R/W

SPDIF output ON/OFF control and sample rate status bits

00: SPDIF output OFF

01: SPDIF output ON (32kS)

10: SPDIF output ON (44.1kS)

11: SPDIF output ON (48kS)

Revision 1v3

- 93

AS3517H-ECTP Datasheet(PDF) 69 Page - ams AG

AS3517H-ECTP Datasheet(HTML) 69 Page - ams AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94

Datasheet Download

Link URL