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AS3517H-ECTP Datasheet(PDF) 76 Page - ams AG |
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AS3517H-ECTP Datasheet(HTML) 76 Page - ams AG |
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76 / 94 page ![]() AS3517 V17 Data Sheet, Confidential © 2003-2007, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved. www.austriamicrosystems.com Table 77 PMU ENABLE Register Name Base Default PMU ENABLE 2-wire serial 00h PMU Extension Enable Register Offset: 18h Enables 12h and 17h to write into extended registers and allows multiplexing supply voltages for monitoring via ADC10. This register is reset at a DVDD-POR. Bit Bit Name Default Access Bit Description 7 0 n/a 6:4 DC_TEST 000 R/W Allows multiplexing internal and external supply voltages to one DC test node which can be further multiplexed to ADC10. The accuracy is 5mV/LSB (see reg. 2Eh) 000: not used 001: AVDD 010: DVDD 011: PVDD1 100: PVDD2 101: CVDD1 110: CVDD2 111: CVDD3 3 PMU_GATE 0 R/W Enables all settings made in registers 0x17-x at once. If this bit is set, changes are activated as soon as they are written to the related register. 0: no change 1: change at once 0:2 PMU_WR_ENABLE 000 R/W Enables extended registers 12h-x and 17h-x 000: not used 001: enables 17h-1 for PVDD1 settings enables 12h-1 for OutCntr1 settings 010: enables 17h-2 for PVDD2 settings enables 12h-2 for OutCntr2_SPDIF settings 011: enables 17h-3 for CVDD1 settings enables 12h-3 for PWM settings 100: enables 17h-4 for CVDD2 settings 101: enables 17h-5 for CVDD3 settings 110: enables 17h-6 for hibernation settings 111: not used Revision 1v3 75 - 93 |
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