CS4225 datasheet(16/30 Pages) CIRRUS

16 / 30 page

low to write. The next 8 bits form the Memory

Address Pointer (MAP), which is set to the ad-

dress of the register that is to be updated. The

next 8 bits are the data which will be placed into

the CDOUT output stays in the Hi-Z state. It

may be externally pulled high or low with a

47k

Ω resistor.

The CS4225 has a MAP auto increment capabil-

ity, enabled by the INCR bit in the MAP register.

If INCR is a zero, then the MAP will stay con-

stant for successive reads or writes. If INCR is

set to a 1, then MAP will auto increment after

each byte is read or written, allowing block reads

or writes of successive registers.

To read a register, the MAP has to be set to the

correct address by executing a partial write cycle

which finishes (CS high) immediately after the

MAP byte. The auto MAP increment bit (INCR)

may be set or not, as desired. To begin a read,

bring CS low, send out the chip address and set

the read/write bit (R/W) high. The next falling

edge of CCLK will clock out the MSB of the

addressed register (CDOUT will leave the high

impedance state). If the MAP auto increment bit

is set to 1, the data for successive registers will

appear consecutively.

2C ®Mode

In I

2C® mode, SDA is a bidirectional data line.

Data is clocked into and out of the part by the

clock, SCL, with the clock to data relationship as

shown in Figure 7. There is no CS pin. Pins

AD0, AD1, AD2, AD3 form the chip address.

The upper 3 bits of the 7 bit address field must

be 001. To communicate with a CS4225, the

LSBs of the chip address field, which is the first

byte sent to the CS4225, should match the set-

tings of the AD0, AD1, AD2, AD3 pins. The

eighth bit of the address bit is the R/W bit (high

for a read, low for a write). If the operation is a

write, the next byte is the Memory Address

Pointer which selects the register to be read or

written. If the operation is a read, the contents of

the register pointed to by the Memory Address

Pointer will be output. Setting the auto incre-

ment bit in MAP, allows successive reads or

writes of consecutive registers. Each byte is

separated by an acknowledge bit. Use of the I

bus

®compatible interface requires a license from

Philips. I

2C bus® is a registered trademark of

Philips Semiconductors.

Control Port Bit Definitions

All registers can be written and read back, ex-

cept the status report byte, which is read only.

See the following bit definition tables for bit as-

signment information.

SDA

SCL

001

ADDR

AD3-0

R/W

Start

ACK

DATA

1-8

ACK

DATA

1-8

ACK

Stop

Note 2: If operation is a write, this byte contains the Memory Address Pointer, MAP.

Note 1

Note 2

Note 1: The first 3 address bits for the CS4225 must be 001.

Figure 7 - Control Port Timing, I

2C® Mode

CS4225

DS86PP8

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