CS4225 datasheet(17/30 Pages) CIRRUS

17 / 30 page

ATT6 ATT5 ATT4 ATT3 ATT2 ATT1 ATT0

ATT6 to

Sets Attenuator Level

ATT0

0 - No attenuation

127 - 127 dB attenuation

ATT0 represents 1.00 dB

GN4

GN3

GN2

GN1

GN0

GN4 to

Sets Input Gain

GN0

0 - No gain

31 - 46.5 dB gain

GN0 represents 1.5 dB

INCR

MAP3 MAP2 MAP1 MAP0

MAP3-MAP0

0 - Reserved

1 - Output Attenuator 1

2 - Output Attenuator 2

3 - Output Attenuator 3

4 - Output Attenuator 4

5 - Input Gain 1

6 - Input Gain 2

7 - Auxiliary Port Mode

8 - DSP Port Mode

9 - Clock Mode

- Control Byte

- Status Report Byte

- Input Channel Select

- Aux Control Byte

- Reserved

INCR

Auto Increment Control Bit

0 - No auto increment

1 - Auto increment on

AMS ACK1 ACK0 ADF1 ADF0

ADF1 - ADF0

Sets Digital Interface Format

0 - Format 0 - I

1 - Format 1

2 - Format 2

3 - Format 3

ACK1 - ACK0 Sets number of bit clocks per Fs period

0 - 64

1 - 48 - gated 64Fs

2 - 32 - gated 64Fs

3 - 32 - continuous

AMS

AUX Master /Slave control bit

0 - port is master (SCLKAUX and

LRCKAUX are outputs).

1 - port is slave (SCLKAUX and

LRCKAUX are inputs).

Auxiliary Port Mode Byte (7)

DMS DCK1 DCK0 DDF2 DDF1 DDF0

DDF2 - DDF0 Sets Digital Interface Format

0 - Format 0 - I

1 - Format 1

2 - Format 2

3 - Format 3

4 - One data pin in, One data pin out

mode (Format 4).

5 - Output is Format 1 on SDOUT1

and SDOUT2, input is Format 4

on SDIN1.

DCK1 - DCK0 Set number of bit clocks per Fs period

0 - 64

1 - 48 - gated 64 Fs

2 - 32 - gated 64 Fs

3 - 32 - continuous

DMS

DSP Master /Slave control bit

0 - port is master (SLCK and LRCK

are outputs).

1 - port is slave (SLCK and LRCK

are inputs).

DSP Port Mode Byte (8)

Memory Address Pointer (MAP)

Output Attenuator Data Byte (1, 2, 3, 4)

Input Gain Setting Data Byte (5, 6)

CS4225

DS86PP8

CS4225 Datasheet(PDF) 17 Page - Cirrus Logic

CS4225 Datasheet(HTML) 17 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

Datasheet Download

Link URL