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DS2407 Datasheet(PDF) 19 Page - Dallas Semiconductor |
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DS2407 Datasheet(HTML) 19 Page - Dallas Semiconductor |
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19 / 31 page ![]() DS2407 012099 19/31 INITIALIZATION All transactions on the 1–Wire bus begin with an initial- ization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by a presence pulse(s) transmitted by the slave(s). The presence pulse lets the bus master know that the DS2407 is on the bus and is ready to operate. For more details, see the “1–Wire Signaling” section. ROM FUNCTION COMMANDS Once the bus master has detected a presence, it can issue one of the five ROM function commands. All ROM function commands are eight bits long. A list of these commands follows (refer to flowchart in Figure 12): Read ROM [33h] This command allows the bus master to read the DS2407’s 8–bit family code, unique 48–bit serial num- ber, and 8–bit CRC. This command can be used only if there is a single DS2407 on the bus. If more than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same time (open drain will produce a wired–AND result). Match ROM [55h] The match ROM command, followed by a 64–bit ROM sequence, allows the bus master to address a specific DS2407 on a multidrop bus. Only the DS2407 that exactly matches the 64–bit ROM sequence will respond to the subsequent memory function command. All slaves that do not match the 64–bit ROM sequence will wait for a reset pulse. This command can be used with a single or multiple devices on the bus. Skip ROM [CCh] This command can save time in a single drop bus sys- tem by allowing the bus master to access the memory functions without providing the 64–bit ROM code. If more than one slave is present on the bus and a read command is issued following the Skip ROM command, data collision will occur on the bus as multiple slaves transmit simultaneously (open drain pull–downs will produce a wired–AND result). Search ROM [F0h] When a system is initially interrogated, the bus master may not know the number of devices on the 1–Wire bus or their 64–bit ROM codes. The Search ROM command allows the bus master to use a process of elimination to identify the 64–bit ROM codes of all slave devices on the bus. This process of elimination involves repeated application of a simple three–step procedure where the bus master starts by reading a bit position in the 64–bit ROM, followed by reading the complement of that bit position, and finally writing to all the devices still involved in the search the desired logic value for that bit position. A detailed example and a flowchart for the search algorithm can be found in the “Book of DS19xx iButton Standards.” After one complete pass, the bus master knows the con- tents of the 64–bit ROM in one device. Subsequent passes will reveal the total number of devices and their individual ROM codes. In addition, after each complete pass of the search that successfully determines the 64–bit ROM for a specific device on the multidrop bus, that particular device can be individually accessed as if a Match ROM had been issued since all other devices will have dropped out of the search process and are waiting for a reset pulse. |
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