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DS2407 Datasheet(PDF) 20 Page - Dallas Semiconductor |
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DS2407 Datasheet(HTML) 20 Page - Dallas Semiconductor |
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20 / 31 page ![]() DS2407 012099 20/31 DS2407 EQUIVALENT CIRCUIT Figure 10 5 µA Typ. 100 Ω MOSFET TX RX DATA GROUND Q Q RESET D Q D Q R GROUND 10M Ω Typ. “1” PIO ACTIVITY LATCH TO PIO CONTROL 1–WIRE DATA FROM PIO CONTROL EDGE DETECTOR CHANNEL FLIP–FLOP PIO CHANNEL 1–WIRE INTERFACE BUS MASTER CIRCUIT Figure 11 The interface is reduced to the 5k Ω pull–up resistor if one does not intend to program the EPROM cells. BUS MASTER VDD TTL–Equivalent Port Pins RX TX 5k Ω B) Standard TTL VPUP 5k Ω PROGRAMMING PULSE 12V (10 mA min.) BUS MASTER VDD VPUP DS5000 OR 8051 EQUIVALENT Open Drain Port Pin RX TX A) Open Drain 12V TO DATA CONNECTION OF DS2506 5k Ω 10k Ω 10k Ω PGM D S D S S D D S 2N7000 2N7000 2N7000 470 pF VP0300L OR VP0106N3 OR BSS110 CAPACITOR ADDED TO REDUCE COUPLING ON DATA LINE DUE TO PROGRAMMING SIGNAL SWITCHING TO DATA CONNECTION OF DS2507 The diode and Programming Pulse circuit are not required if one does not intend to program the EPROM cells. |
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