TAS5729MD datasheet(33/59 Pages) TI1

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TAS5729MD

www.ti.com

SLOS836A – MAY 2013 – REVISED JUNE 2013

Table 4. Serial Control Interface Register Summary (continued)

NO. OF

DEFAULT

SUBADDRESS

CONTENTS

BYTES

VALUE

0x3D

Reserved(3)

0x3E

AGL2 softening filter alpha

u[31:26], ae[25:0]

0x0008 0000

AGL2 softening filter omega

u[31:26], oe[25:0]

0x0078 0000

0x3F

AGL2 attack rate

u[31:26], at[25:0]

0x0008 0000

AGL2 release rate

u[31:26], rt[25:0]

0xFFF8 0000

0x40

AGL1 attack threshold

T1[31:0] (9.23 format)

0x0800 0000

0x41–0x42

Reserved(3)

0x43

AGL2 attack threshold

T2[31:0] (9.23 format)

0x0074 0000

0x44–0x45

Reserved(3)

0x46

AGL control

Description shown in subsequent section

0x0002 0000

0x47–0x4E

Reserved(3)

0x4F

PWM switching rate control

u[31:4], src[3:0]

0x0000 0008

0x50

EQ control

Description shown in subsequent section

0x0F70 8000

0x51

Ch 1 output mixer

Ch 1 output mix1[1]

0x0080 0000

Ch 1 output mix1[0]

0x0000 0000

0x52

Ch 2 output mixer

Ch 2 output mix2[1]

0x0080 0000

Ch 2 output mix2[0]

0x0000 0000

0x53

Reserved(3)

0x54

Reserved(3)

0x56

Output post-scale

u[31:26], post[25:0]

0x0080 0000

0x57

Output pre-scale

u[31:26], pre[25:0] (9.17 format)

0x0002 0000

0x58

ch1_bq[10]

u[31:26], b0[25:0]

0x0080 0000

u[31:26], b1[25:0]

0x0000 0000

u[31:26], b2[25:0]

0x0000 0000

u[31:26], a1[25:0]

0x0000 0000

u[31:26], a2[25:0]

0x0000 0000

0x59

ch1_bq[11]

u[31:26], b0[25:0]

0x0080 0000

u[31:26], b1[25:0]

0x0000 0000

u[31:26], b2[25:0]

0x0000 0000

u[31:26], a1[25:0]

0x0000 0000

u[31:26], a2[25:0]

0x0000 0000

0x5A

ch4_bq[0]

u[31:26], b0[25:0]

0x0080 0000

u[31:26], b1[25:0]

0x0000 0000

u[31:26], b2[25:0]

0x0000 0000

u[31:26], a1[25:0]

0x0000 0000

u[31:26], a2[25:0]

0x0000 0000

0x5B

ch4_bq[1]

u[31:26], b0[25:0]

0x0080 0000

u[31:26], b1[25:0]

0x0000 0000

u[31:26], b2[25:0]

0x0000 0000

u[31:26], a1[25:0]

0x0000 0000

u[31:26], a2[25:0]

0x0000 0000

(3)

Reserved registers should not be accessed.

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