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TAS5729MD Datasheet(PDF) 4 Page - Texas Instruments |
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TAS5729MD Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 59 page ![]() TAS5729MD SLOS836A – MAY 2013 – REVISED JUNE 2013 www.ti.com TAS5729MD Pin Out (continued) DVDD 34 P - Power supply for the internal digital circuitry GVDD_REG 40 P - Voltage regulator derived from PVDD supply(3) LRCLK 26 DI Pulldown Word select clock of the serial audio port. MCLK 21 DI Pulldown Master clock used for internal clock tree and sub-circuit and state machine clocking Not connected inside the device (all NC terminals should be connected to ground NC 31 - - for optimal thermal performance) Ground for oscillator circuitry (this terminal should be connected to the system OSC_GND 23 P - ground) OSC_RES 22 AO - Connection point for oscillator trim resistor Quick powerdown of the device that is used upon an unexpected loss of PVDD or DVDD power supply in order to quickly transition the outputs of the speaker PDN 25 DI Pullup amplifier to hi-Z. This quick powerdown feature avoids the audible anamolies that would occur as a result of loss of either of the supplies. PGND 1, 44 P - Ground for power device circuitry(2) PLL_FLTM 16 AI/AO - Negative connection point for the PLL loop filter components PLL_FLTP 17 AI/AO - Positive connection point for the PLL loop filter components PLL_GND 15 P - Ground for PLL circuitry (this terminal should be connected to the system ground) Thermal and ground pad that provides both an electrical connection to the ground PowerPAD™ - P - plane and a thermal path to the PCB for heat dissipation. This pad must be grounded to the system ground. (4) PVDD 4, 41 P - Power supply for internal power circuitry RST 32 DI Pullup Places the device in reset when pulled low SCL 30 DI - I²C serial control port clock SCLK 27 DI Pulldown Bit clock of the serial audio port SDA 29 DI/DO - I²C serial control port data SDIN 28 DI Pulldown Data line to the serial data port SPK_OUTx 2, 43, 45, 48 AO - Speaker amplifier outputs Controls ramp time of SPK_OUTx to minimize pop. Leave this pin floating for BD SSTIMER 38 AI - mode. Requires capacitor to GND in AD mode, as is shown in the Typical Application Circuit Diagrams. The capacitor determines the ramp time. TEST1 5 DO - Used for testing during device production (this terminal must be left floating) TEST2 6 DO - Used for testing during device production (this terminal must be left floating) TEST3 33 DI - Used for testing during device production (this terminal must be connected to GND) (4) This terminal should be connected to the system ground 4 Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TAS5729MD |
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