MB89181 datasheet(19/50 Pages) FUJITSU

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MB89180 Series

s BLOCK DIAGRAM

Main clock oscillator

Clock controller

Subclock oscillator

(32.768 kHz)

21-bit time-base timer

External interrupt 2

(wake-up function)

CMOS I/O port

N-ch open-drain output port

(Only P30 for CMOS output port)

F 2MC-8L

RAM

(256

× 8 bits max.)

MODA

V CC

V SS

Other pins

X0A

X1A

RST

P00/INT20

to P07/INT27

ROM

(8 K

× 8 bits max.)

8-bit timer/counter

8-bit serial I/O

Buzzer output

N-ch open-drain I/O port

P26 *2

P21 *2

P25/SCK

P24/SO

P23/SI

P27 *2 /BUZ

P14 to P17

Remote control

transmission output

Reset circuit

CPU

8-bit timer/counter

CMOS I/O port

External interrupt 1

(wake-up function)

N-ch open-drain output port

P22/TO

P20/EC

P10/INT10 to

P13/INT13

SEG28 to SEG31 *1

(Also serve as P14 to P17.)

SEG24 to SEG27 *1

(Also serve as P10 to P13.)

SEG0 to SEG7

COM0, COM1

COM2 (Also serves as P31.)

COM3 (Also serves as P32.)

V1 to V3

P57/SEG23 *1

to P54/SEG20 *1

P53/SEG19 *1

to P50/SEG16 *1

P47/SEG15 *1

to P44/SEG12 *1

P43/SEG11 *1

to P40/SEG8 *1

LCD controller/driver

P30/RCO

P31/COM2

P32/COM3

MODA

V CC

V SS

*1: The segment or port function is selected by the mask option.

*2: N-ch open-drain heavy-current drive type

× 4 bits

VRAM

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