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M80C196KB Datasheet(PDF) 18 Page - Intel Corporation |
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M80C196KB Datasheet(HTML) 18 Page - Intel Corporation |
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18 / 30 page ![]() M80C196KB WSR 76543210 0 0 0 0 WWWW 14h readwrite WWWWe 0 SFRs function like a superset of M8096 SFRs WWWWe14 PPW register WWWWe15 Exchange readwrite registers WWWWeOTHER Undefined do not use 0000 These bits must always be written as zeros to provide compatibility with future products IOS2 76543210 START T2 HSO5 HSO4 HSO3 HSO2 HSO1 HSO0 A2D RESET 17h read Indicates which HSO event occured START A2D HSO CMD 15 start A to D T2RESET HSO CMD 14 Timer 2 reset HSO0-5 Output pins HSO0 through HSO5 IOC2 76543210 CLEAR ENA T2ALT A2D X SLOW T2UD FAST CAM LOCK INT CPD PWM ENA T2EN 0Bh CLEAR CAM Clear Entire CAM write ENA LOCK Enable lockable CAM entry feature T2ALT INT Enable T2 Alternate Interrupt at 8000H A2D CPD Clock Prescale Disable for low XTAL frequency (A to D conversion in fewer state times) X Set to 0 SLOW PWM Turn on divide by 2 Prescaler on PWM T2UD ENA Enable Timer 2 as updown counter FAST T2EN Enable Fast increment of T2 once per state time The following registers are the same on the M80C196KB as they were on the M8096BH AD Result LO (02H) 271089 – 4 AD Command (02H) 271089 – 5 18 |
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